source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc @ 625

Last change on this file since 625 was 625, checked in by krille_n_, 13 months ago

Changes:

  • Added a configuration option to let the BIOS store RamVars to an UMB when Full operating mode is enabled. This is primarily for XT class machines with RAM in the UMA (which apparently is a common thing these days).
  • Added two new builds specifically for IBM PS/2 machines. This is for support of the new McIDE adapter from the guys at zzxio.com. Note that the additional hardware specific code (under the USE_PS2 define) is for the PS/2 machines themselves and not for the McIDE adapters, so any controller in an IBM PS/2 machine can be used with the USE_PS2 define.
  • Moved pColorTheme out of the range of ROMVARS being copied over when doing "Load old settings from EEPROM" in XTIDECFG. This fixed a serious bug from r592 where loading a BIOS from file and then loading the old settings from ROM would corrupt 7 bytes of code somewhere in the loaded BIOS.
  • Optimizations (speed and size) to the library. Browsing the menus in XTIDECFG should now feel a little less sluggish.
  • Hopefully fixed a problem with the PostCommitHook script where it sometimes wouldn't find the CommitInProgress file. I say hopefully because testing this is a nightmare.
File size: 9.9 KB
Line 
1; Project name  :   XTIDE Universal BIOS
2; Description   :   Defines for ROMVARS struct containing variables stored
3;                   in BIOS ROM.
4
5;
6; XTIDE Universal BIOS and Associated Tools
7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2023 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17; GNU General Public License for more details.
18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
21%ifndef ROMVARS_INC
22%define ROMVARS_INC
23
24
25; Master/Slave drive specific parameters
26struc DRVPARAMS
27    .wFlags         resb    2   ; Drive flags
28    .dwMaximumLBA:              ; User specified maximum number of sectors
29    .wCylinders     resb    2   ; User specified cylinders (1...16383)
30    .wHeadsAndSectors:
31    .bHeads         resb    1   ; User specified Heads (1...16)
32    .bSect          resb    1   ; User specified Sectors per track (1...63)
33endstruc
34
35; Bit defines for DRVPARAMS.wFlags - these flags are accessed as bytes so changes here might require changes elsewhere
36MASK_DRVPARAMS_WRITECACHE       EQU (3<<0)  ; Bits 0...1, Drive internal write cache settings (must start at bit 0)
37    DEFAULT_WRITE_CACHE             EQU 0   ; Must be 0
38    DISABLE_WRITE_CACHE             EQU 1
39    ENABLE_WRITE_CACHE              EQU 2
40MASK_DRVPARAMS_TRANSLATEMODE    EQU (3<<TRANSLATEMODE_FIELD_POSITION)   ; Bits 2...3, Position shared with DPT
41    TRANSLATEMODE_FIELD_POSITION    EQU 2
42    TRANSLATEMODE_NORMAL            EQU 0   ; Must be zero
43    TRANSLATEMODE_LARGE             EQU 1
44    TRANSLATEMODE_ASSISTED_LBA      EQU 2   ; 28-bit or 48-bit LBA
45    TRANSLATEMODE_AUTO              EQU 3   ; Only available in ROMVARS, not in DPTs
46FLG_DRVPARAMS_BLOCKMODE         EQU (1<<4)  ; Enable Block mode transfers
47FLG_DRVPARAMS_USERCHS           EQU (1<<5)  ; User specified P-CHS values
48FLG_DRVPARAMS_USERLBA           EQU (1<<6)  ; User specified LBA value
49FLG_DRVPARAMS_DO_NOT_DETECT     EQU (1<<7)  ; Disable detection of drive
50
51
52; Controller specific variables
53struc IDEVARS
54;;; Word 0
55    .wSerialPortAndBaud:                    ; Serial connection port (low, divided by 4) and baud rate divisor (high)
56    .wBasePort:                             ; IDE Base Port for Command Block (usual) Registers
57    .bSerialPort                resb    1
58    .bSerialBaud                resb    1
59
60;;; Word 1
61    .wControlBlockPort:
62    .bSerialUnused              resb    1   ; IDE Base Port for Control Block Registers
63
64    .wSerialCOMPortCharAndDevice:           ; In DetectPrint, we grab the COM Port char and Device at the same time
65    .bSerialCOMPortChar         resb    1   ; Serial connection COM port number/letter
66
67;;; Word 2
68    .bDevice                    resb    1   ; Device type
69    .bIRQ                       resb    1   ; Interrupt Request Number
70
71;;; And more...
72    .drvParamsMaster            resb    DRVPARAMS_size
73    .drvParamsSlave             resb    DRVPARAMS_size
74endstruc
75
76%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
77    %if IDEVARS.bSerialCOMPortChar+1 != IDEVARS.bDevice
78        %error "IDEVARS.bSerialCOMPortChar needs to come immediately before IDEVARS.bDevice so that both bytes can be fetched at the same time inside DetectPrint.asm"
79    %endif
80%endif
81
82STANDARD_CONTROL_BLOCK_OFFSET           EQU     200h
83XTIDE_CONTROL_BLOCK_OFFSET              EQU     8h      ; For XTIDE, A3 is used to control selected register (CS0 vs CS1)...
84XTCF_CONTROL_BLOCK_OFFSET               EQU     10h     ; ...and for XT-CF (all variants), it's A4
85ADP50L_CONTROL_BLOCK_OFFSET             EQU     10h
86
87; Default values for Port and PortCtrl, shared with the configurator
88;
89DEVICE_XTIDE_DEFAULT_PORT               EQU     300h    ; Also the default port for XT-CF
90DEVICE_XTIDE_DEFAULT_PORTCTRL           EQU     (DEVICE_XTIDE_DEFAULT_PORT + XTIDE_CONTROL_BLOCK_OFFSET)
91; Note XT-CF control port is SHL 1 relative to XTIDE, and coded that way hence no need for specific definition like...
92; DEVICE_XTCF_DEFAULT_PORTCTRL          EQU     (DEVICE_XTIDE_DEFAULT_PORT + XTCF_CONTROL_BLOCK_OFFSET)
93
94DEVICE_ATA_PRIMARY_PORT                 EQU     1F0h
95DEVICE_ATA_PRIMARY_PORTCTRL             EQU     (DEVICE_ATA_PRIMARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
96
97DEVICE_ATA_SECONDARY_PORT               EQU     170h
98DEVICE_ATA_SECONDARY_PORTCTRL           EQU     (DEVICE_ATA_SECONDARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
99
100DEVICE_ATA_TERTIARY_PORT                EQU     1E8h
101DEVICE_ATA_TERTIARY_PORTCTRL            EQU     (DEVICE_ATA_TERTIARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
102
103DEVICE_ATA_QUATERNARY_PORT              EQU     168h
104DEVICE_ATA_QUATERNARY_PORTCTRL          EQU     (DEVICE_ATA_QUATERNARY_PORT + STANDARD_CONTROL_BLOCK_OFFSET)
105
106
107; Device types for IDEVARS.bDevice
108; IDE Devices are grouped so device numbers cannot be changed without modifying code elsewhere!
109COUNT_OF_STANDARD_IDE_DEVICES           EQU 2   ; 16- and 32-bit controllers
110COUNT_OF_8BIT_IDE_DEVICES               EQU 10
111COUNT_OF_ALL_IDE_DEVICES                EQU (COUNT_OF_8BIT_IDE_DEVICES + COUNT_OF_STANDARD_IDE_DEVICES)
112; Standard port mapped I/O
113DEVICE_16BIT_ATA                        EQU (0<<1)
114DEVICE_32BIT_ATA                        EQU (1<<1)
115DEVICE_8BIT_ATA                         EQU ((COUNT_OF_STANDARD_IDE_DEVICES+0)<<1)  ; 16- or 32-bit controller in 8-bit mode
116DEVICE_8BIT_XTIDE_REV1                  EQU ((COUNT_OF_STANDARD_IDE_DEVICES+1)<<1)
117; Address lines A0 and A3 are swapped
118DEVICE_8BIT_XTIDE_REV2                  EQU ((COUNT_OF_STANDARD_IDE_DEVICES+2)<<1)  ; Or rev 1 with swapped A0 and A3...
119DEVICE_8BIT_XTIDE_REV2_OLIVETTI         EQU ((COUNT_OF_STANDARD_IDE_DEVICES+3)<<1)  ; ...in Olivetti M24 and derivatives
120; IDE Register offsets are SHL 1
121DEVICE_8BIT_XTCF_PIO8                   EQU ((COUNT_OF_STANDARD_IDE_DEVICES+4)<<1)  ; XT-CF using 8-bit PIO mode
122DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD  EQU ((COUNT_OF_STANDARD_IDE_DEVICES+5)<<1)  ; XT-CF using 8-bit PIO mode, but with 16-bit instructions
123DEVICE_8BIT_XTCF_PIO16_WITH_BIU_OFFLOAD EQU ((COUNT_OF_STANDARD_IDE_DEVICES+6)<<1)  ; Lo-tech 8-bit IDE Adapter
124DEVICE_8BIT_XTCF_DMA                    EQU ((COUNT_OF_STANDARD_IDE_DEVICES+7)<<1)  ; XT-CFv3 using DMA
125; Memory Mapped I/O
126DEVICE_8BIT_JRIDE_ISA                   EQU ((COUNT_OF_STANDARD_IDE_DEVICES+8)<<1)  ; JR-IDE/ISA (Memory Mapped I/O)
127DEVICE_8BIT_ADP50L                      EQU ((COUNT_OF_STANDARD_IDE_DEVICES+9)<<1)  ; SVC ADP50L (Memory Mapped I/O)
128; Virtual devices
129DEVICE_SERIAL_PORT                      EQU (COUNT_OF_ALL_IDE_DEVICES<<1)
130
131FIRST_XTCF_DEVICE                       EQU DEVICE_8BIT_XTCF_PIO8
132LAST_XTCF_DEVICE                        EQU DEVICE_8BIT_XTCF_DMA
133XTCF_DEVICE_OFFSET                      EQU FIRST_XTCF_DEVICE                       ; Used for XT-CF device <--> mode conversion
134
135; Segment when RAMVARS is stored to top of interrupt vectors.
136LITE_MODE_RAMVARS_SEGMENT               EQU 30h
137
138; ROM Variables. Written to the ROM image before flashing.
139; The ROMVARS version in Version.inc must be incremented whenever this struc changes.
140struc ROMVARS
141    .wRomSign           resb    2   ; ROM Signature (AA55h)
142    .bRomSize           resb    1   ; ROM size in 512 byte blocks
143    .rgbJump            resb    3   ; First instruction to ROM init (jmp)
144
145    .rgbSign            resb    6   ; Signature for XTIDE Configurator Program (must be even length)
146    .szTitle            resb    32  ; BIOS title string
147    .szVersion          resb    18  ; BIOS version string (supports up to r999)
148
149    .pColorTheme        resb    2   ; Ptr to the color attribute struc used by the boot menu and hotkey bar
150    .wFlags             resb    2   ; Word for ROM flags
151    ; Note! Any additional ROMVARS must be added below if they are supposed to be copied
152    ; over when doing "Load old settings from EEPROM" to a new BIOS loaded from file.
153    .wRamVars           resb    2   ; Segment address for RamVars
154    .wDisplayMode       resb    2   ; Display mode for boot menu
155    .wBootTimeout       resb    2   ; Boot Menu selection timeout in system timer ticks
156    .bIdeCnt            resb    1   ; Number of available IDE controllers
157    .bBootDrv           resb    1   ; Default drive to boot from
158    .bMinFddCnt         resb    1   ; Minimum number of Floppy Drives
159    .bStealSize         resb    1   ; Number of 1kB blocks stolen from 640kB base RAM
160    .bIdleTimeout       resb    1   ; Standby timer value
161
162                        alignb  2   ; WORD align the IDEVARS structures
163    .ideVarsBegin:
164    .ideVars0           resb    IDEVARS_size
165    .ideVars1           resb    IDEVARS_size
166    .ideVars2           resb    IDEVARS_size
167    .ideVars3           resb    IDEVARS_size
168
169%ifdef MODULE_SERIAL
170    .ideVarsSerialAuto  resb    IDEVARS_size
171%endif
172
173    .ideVarsEnd:
174endstruc
175
176%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
177    %if ROMVARS.ideVarsEnd & 0xff00 <> 0
178        %error ".ideVars structures must fit within the first 256 bytes of the ROM image"
179    %endif
180    %if (ROMVARS.ideVarsEnd - ROMVARS.ideVarsBegin) = 0
181        %error "there must be at least one .ideVars structure, it would be bizarre if this were not true, but it is assumed in the ah0h reset code."
182    %endif
183%endif
184
185NUMBER_OF_IDEVARS                   EQU ((ROMVARS.ideVarsEnd - ROMVARS.ideVarsBegin) / IDEVARS_size)
186
187; Bit defines for ROMVARS.wFlags
188FLG_ROMVARS_FULLMODE                    EQU (1<<0)  ; Full operating mode (steals base RAM, supports EBIOS etc.)
189FLG_ROMVARS_CLEAR_BDA_HD_COUNT          EQU (1<<1)  ; This flag has two purposes; * Removes the system BIOS "dummy" drive
190                                                    ; so that Windows 9x protected mode drivers can be used with XUB drives.
191                                                    ; * Some computers (Zenith Z-171 and Z-161) do not clear the BDA hard
192                                                    ; drive count which causes it to increment on each warm boot.
193FLG_ROMVARS_SERIAL_SCANDETECT           EQU (1<<3)  ; Scan COM ports at the end of drive detection.  Can also be invoked
194                                                    ; by holding down the ALT key at the end of drive detection.
195                                                    ; (Conveniently, this is 8, a fact we exploit when testing the bit)
196
197; Here in case the configuration needs to know functionality is present. Note! Changing the order/location of these flags
198; also requires changes elsewhere as they are usually tested using byte-accesses for efficiency.
199FLG_ROMVARS_MODULE_POWER_MANAGEMENT     EQU (1<<5)
200FLG_ROMVARS_MODULE_8BIT_IDE             EQU (1<<6)
201FLG_ROMVARS_MODULE_8BIT_IDE_ADVANCED    EQU (1<<7)
202FLG_ROMVARS_MODULE_ADVANCED_ATA         EQU (1<<8)
203FLG_ROMVARS_MODULE_BOOT_MENU            EQU (1<<9)
204FLG_ROMVARS_MODULE_EBIOS                EQU (1<<10)
205FLG_ROMVARS_MODULE_HOTKEYS              EQU (1<<11)
206FLG_ROMVARS_MODULE_IRQ                  EQU (1<<12)
207FLG_ROMVARS_MODULE_SERIAL               EQU (1<<13)
208FLG_ROMVARS_MODULE_SERIAL_FLOPPY        EQU (1<<14)
209FLG_ROMVARS_MODULE_STRINGS_COMPRESSED   EQU (1<<15)
210
211
212; Boot Menu Display Modes (see Assembly Library Display.inc for standard modes)
213DEFAULT_TEXT_MODE       EQU 4
214
215
216%endif ; ROMVARS_INC
Note: See TracBrowser for help on using the repository browser.