source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc@ 495

Last change on this file since 495 was 493, checked in by gregli@…, 12 years ago

Separated MODULE_8BIT_IDE into the basic part used by XTIDE rev 1 and rev 2 which is PIO based, and MODULE_8BIT_IDE_ADVANCED for JRIDE and XTCF support which requires memory mapping and/or DMA. This allows for creating an 8KB image with boot menu support (but no hotkeys) for the XTIDE rev 1. Cleaned up how we reset the drive translation information, ensuring it is properly set between boot attempt on a primary and secondary drive - as a result we clean it when needed, rather than trying to always keep it clean. Also fixed translation bugs in int13h.asm where I had previously missed converting some MODULE_HOTKEYS into MODULE_DRIVEXLATE.

File size: 7.7 KB
RevLine 
[90]1; Project name : XTIDE Universal BIOS
[3]2; Description : Defines for ROMVARS struct containing variables stored
3; in BIOS ROM.
[376]4
5;
[380]6; XTIDE Universal BIOS and Associated Tools
[376]7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
[380]13;
[376]14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
[380]17; GNU General Public License for more details.
[376]18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
[3]21%ifndef ROMVARS_INC
22%define ROMVARS_INC
23
[181]24; ROM Variables. Written to the ROM image before flashing.
[3]25struc ROMVARS
[181]26 .wRomSign resb 2 ; ROM Signature (AA55h)
27 .bRomSize resb 1 ; ROM size in 512 byte blocks
28 .rgbJump resb 3 ; First instruction to ROM init (jmp)
[90]29
[181]30 .rgbSign resb 8 ; Signature for XTIDE Configurator Program
31 .szTitle resb 31 ; BIOS title string
32 .szVersion resb 25 ; BIOS version string
[90]33
[181]34 .wFlags resb 2 ; Word for ROM flags
35 .wDisplayMode resb 2 ; Display mode for boot menu
36 .wBootTimeout resb 2 ; Boot Menu selection timeout in system timer ticks
37 .bIdeCnt resb 1 ; Number of available IDE controllers
[392]38 .bBootDrv resb 1 ; Default drive to boot from
[181]39 .bMinFddCnt resb 1 ; Minimum number of Floppy Drives
40 .bStealSize resb 1 ; Number of 1kB blocks stolen from 640kB base RAM
[380]41 .bIdleTimeout resb 1 ; Standby timer value
[90]42
[316]43 .ideVarsBegin:
[181]44 .ideVars0 resb IDEVARS_size
45 .ideVars1 resb IDEVARS_size
46 .ideVars2 resb IDEVARS_size
47 .ideVars3 resb IDEVARS_size
[175]48
[176]49%ifdef MODULE_SERIAL
[175]50 .ideVarsSerialAuto resb IDEVARS_size
[176]51%endif
[316]52
53 .ideVarsEnd:
[3]54endstruc
55
[316]56%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
57 %if ROMVARS.ideVarsEnd & 0xff00 <> 0
58 %error ".ideVars structures must fit within the first 256 bytes of the ROM image"
59 %endif
60 %if (ROMVARS.ideVarsEnd - ROMVARS.ideVarsBegin) = 0
[322]61 %error "there must be at least one .ideVars structure, it would be bizarre if this were not true, but it is assumed in the ah0h reset code."
[316]62 %endif
63%endif
64
[3]65; Bit defines for ROMVARS.wFlags
[199]66FLG_ROMVARS_FULLMODE EQU (1<<0) ; Full operating mode (steals base RAM, supports EBIOS etc.)
67FLG_ROMVARS_SERIAL_SCANDETECT EQU (1<<3) ; Scan COM ports at the end of drive detection. Can also be invoked
68 ; by holding down the ALT key at the end of drive detection.
69 ; (Conveniently, this is 8, a fact we exploit when testing the bit)
[176]70
[400]71; Here in case the configuration needs to know functionality is present
72FLG_ROMVARS_MODULE_FEATURE_SETS EQU (1<<5)
73FLG_ROMVARS_MODULE_8BIT_IDE EQU (1<<6)
[493]74FLG_ROMVARS_MODULE_8BIT_IDE_ADVANCED EQU (1<<7)
[400]75FLG_ROMVARS_MODULE_ADVANCED_ATA EQU (1<<8)
76FLG_ROMVARS_MODULE_BOOT_MENU EQU (1<<9)
77FLG_ROMVARS_MODULE_EBIOS EQU (1<<10)
78FLG_ROMVARS_MODULE_HOTKEYS EQU (1<<11)
79FLG_ROMVARS_MODULE_IRQ EQU (1<<12)
80FLG_ROMVARS_MODULE_SERIAL EQU (1<<13)
81FLG_ROMVARS_MODULE_SERIAL_FLOPPY EQU (1<<14)
82FLG_ROMVARS_MODULE_STRINGS_COMPRESSED EQU (1<<15)
[397]83
84
[143]85; Boot Menu Display Modes (see Assembly Library Display.inc for standard modes)
86DEFAULT_TEXT_MODE EQU 4
[3]87
[143]88
[3]89; Controller specific variables
90struc IDEVARS
[233]91;;; Word 0
92 .wSerialPortAndBaud: ; Serial connection port (low, divided by 4) and baud rate divisor (high)
[473]93 .wBasePort: ; IDE Base Port for Command Block (usual) Registers
[233]94 .bSerialPort resb 1
95 .bSerialBaud resb 1
[196]96
[233]97;;; Word 1
[473]98 .wControlBlockPort:
99 .bXTCFcontrolRegister: ; XT-CF autodetects ports
[233]100 .bSerialUnused resb 1 ; IDE Base Port for Control Block Registers
[196]101
[233]102 .wSerialCOMPortCharAndDevice: ; In DetectPrint, we grab the COM Port char and Device at the same time
103 .bSerialCOMPortChar resb 1 ; Serial connection COM port number/letter
104
105;;; Word 2
[196]106 .bDevice resb 1 ; Device type
107 .bIRQ resb 1 ; Interrupt Request Number
[233]108
109;;; And more...
[196]110 .drvParamsMaster resb DRVPARAMS_size
111 .drvParamsSlave resb DRVPARAMS_size
[3]112endstruc
113
[261]114%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
115 %if IDEVARS.bSerialCOMPortChar+1 != IDEVARS.bDevice
116 %error "IDEVARS.bSerialCOMPortChar needs to come immediately before IDEVARS.bDevice so that both bytes can be fetched at the same time inside DetectPrint.asm"
117 %endif
[233]118%endif
119
[199]120; Default values for Port and PortCtrl, shared with the configurator
121;
122DEVICE_XTIDE_DEFAULT_PORT EQU 300h
[400]123DEVICE_XTIDE_DEFAULT_PORTCTRL EQU (DEVICE_XTIDE_DEFAULT_PORT + 8h)
[199]124
[493]125DEVICE_ATA_PRIMARY_PORT EQU 300h
126DEVICE_ATA_PRIMARY_PORTCTRL EQU (DEVICE_ATA_PRIMARY_PORT + 8h)
[398]127
128DEVICE_ATA_SECONDARY_PORT EQU 170h
[400]129DEVICE_ATA_SECONDARY_PORTCTRL EQU (DEVICE_ATA_SECONDARY_PORT + 200h)
[398]130
131DEVICE_ATA_TERTIARY_PORT EQU 1E8h
[400]132DEVICE_ATA_TERTIARY_PORTCTRL EQU (DEVICE_ATA_TERTIARY_PORT + 200h)
[398]133
134DEVICE_ATA_QUATERNARY_PORT EQU 168h
[400]135DEVICE_ATA_QUATERNARY_PORTCTRL EQU (DEVICE_ATA_QUATERNARY_PORT + 200h)
[398]136
137
[175]138; Device types for IDEVARS.bDevice
[473]139; IDE Devices are grouped so device numbers cannot be changed without modifying code elsewhere!
[199]140;
[480]141COUNT_OF_STANDARD_IDE_DEVICES EQU 2 ; 16- and 32-bit controllers
142COUNT_OF_8BIT_IDE_DEVICES EQU 7
[473]143COUNT_OF_ALL_IDE_DEVICES EQU (COUNT_OF_8BIT_IDE_DEVICES + COUNT_OF_STANDARD_IDE_DEVICES)
144; Standard port mapped I/O
145DEVICE_16BIT_ATA EQU (0<<1)
146DEVICE_32BIT_ATA EQU (1<<1)
[482]147DEVICE_8BIT_ATA EQU ((COUNT_OF_STANDARD_IDE_DEVICES+0)<<1) ; 16- or 32-bit controller in 8-bit mode
148DEVICE_8BIT_XTIDE_REV1 EQU ((COUNT_OF_STANDARD_IDE_DEVICES+1)<<1)
[473]149; Address lines A0 and A3 are swapped
[480]150DEVICE_8BIT_XTIDE_REV2 EQU ((COUNT_OF_STANDARD_IDE_DEVICES+2)<<1) ; Or rev 1 with swapped A0 and A3
[473]151; IDE Register offsets are SHL 1
[480]152DEVICE_8BIT_XTCF_PIO8 EQU ((COUNT_OF_STANDARD_IDE_DEVICES+3)<<1) ; XT-CF using 8-bit PIO mode
153DEVICE_8BIT_XTCF_DMA EQU ((COUNT_OF_STANDARD_IDE_DEVICES+4)<<1) ; XT-CF using DMA
154DEVICE_8BIT_XTCF_MEMMAP EQU ((COUNT_OF_STANDARD_IDE_DEVICES+5)<<1) ; XT-CF using Memory Mapped transfers (not I/O)
[473]155; Memory Mapped I/O
[480]156DEVICE_8BIT_JRIDE_ISA EQU ((COUNT_OF_STANDARD_IDE_DEVICES+6)<<1) ; JR-IDE/ISA (Memory Mapped I/O)
[473]157; Virtual devices
[400]158DEVICE_SERIAL_PORT EQU (COUNT_OF_ALL_IDE_DEVICES<<1)
159
160
161
[3]162; Master/Slave drive specific parameters
163struc DRVPARAMS
164 .wFlags resb 2 ; Drive flags
[227]165 .dwMaximumLBA: ; User specified maximum number of sectors
[3]166 .wCylinders resb 2 ; User specified cylinders (1...16383)
[99]167 .wHeadsAndSectors:
168 .bHeads resb 1 ; User specified Heads (1...16)
[3]169 .bSect resb 1 ; User specified Sectors per track (1...63)
170endstruc
171
172; Bit defines for DRVPARAMS.wFlags
[422]173MASK_DRVPARAMS_WRITECACHE EQU (3<<0) ; Bits 0...1, Drive internal write cache settings (must start at bit 0)
174 DEFAULT_WRITE_CACHE EQU 0 ; Must be 0
175 DISABLE_WRITE_CACHE EQU 1
176 ENABLE_WRITE_CACHE EQU 2
177MASK_DRVPARAMS_TRANSLATEMODE EQU (3<<TRANSLATEMODE_FIELD_POSITION) ; Bits 2...3, Position shared with DPT
178 TRANSLATEMODE_FIELD_POSITION EQU 2
179 TRANSLATEMODE_NORMAL EQU 0
180 TRANSLATEMODE_LARGE EQU 1
181 TRANSLATEMODE_ASSISTED_LBA EQU 2 ; 28-bit or 48-bit LBA
182 TRANSLATEMODE_AUTO EQU 3 ; Only available in ROMVARS, not in DPTs
183FLG_DRVPARAMS_BLOCKMODE EQU (1<<4) ; Enable Block mode transfers
184FLG_DRVPARAMS_USERCHS EQU (1<<5) ; User specified P-CHS values
185 MAX_USER_CYLINDERS EQU 16383
186 MAX_USER_HEADS EQU 16
187 MAX_USER_SECTORS_PER_TRACK EQU 63
188FLG_DRVPARAMS_USERLBA EQU (1<<6) ; User specified LBA value
189 MIN_USER_LBA_COUNT EQU ((MAX_USER_CYLINDERS*MAX_USER_HEADS*MAX_USER_SECTORS_PER_TRACK)+1)
190 MAX_USER_LBA_COUNT EQU ((2^28)-1)
[3]191
[276]192
[3]193%endif ; ROMVARS_INC
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