source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/IntController.inc@ 212

Last change on this file since 212 was 152, checked in by Tomi Tilli, 14 years ago

Changes to XTIDE Universal BIOS:

  • XTIDE mod should now be supported (untested).
  • Interrupt Service Routine no longer requires variable from RAMVARS.
  • Some small improvements.
File size: 2.3 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Equates for 8259 Interrupt Controllers.
3%ifndef INT_CONTROLLER_INC
4%define INT_CONTROLLER_INC
5
6; 8259 Master and Slave Interrupt Controller Ports
7MASTER_8259_IRR_AND_ISR_in EQU 20h ; Interrupt Request Register / Interrupt In-Service Register
8MASTER_8259_COMMAND_out EQU 20h ; Command output
9MASTER_8259_IMR EQU 21h ; Interrupt Mask Register
10MASTER_8259_INIT_out EQU 21h ; Initialization Command Parameters
11SLAVE_8259_IRR_AND_ISR_in EQU 0A0h ; Interrupt Request Register / Interrupt In-Service Register
12SLAVE_8259_COMMAND_out EQU 0A0h ; Command output
13SLAVE_8259_IMR EQU 0A1h ; Interrupt Mask Register
14SLAVE_8259_INIT_out EQU 0A1h ; Initialization Command Parameters
15
16; 8259 Interrupt Controller Commands
17COMMAND_CLEAR_ROTATE_IN_AUTOMATIC_EOI_MODE EQU 00h
18COMMAND_READ_INTERRUPT_REQUEST_REGISTER EQU 0Ah
19COMMAND_READ_INTERRUPT_INSERVICE_REGISTER EQU 0Bh
20COMMAND_END_OF_INTERRUPT EQU 20h
21COMMAND_NO_OPERATION EQU 40h
22COMMAND_CLEAR_SPECIAL_MASK_MODE EQU 48h
23COMMAND_SPECIFIC_EOI_FOR_IR0 EQU 60h
24COMMAND_SPECIFIC_EOI_FOR_IR1 EQU 61h
25COMMAND_SPECIFIC_EOI_FOR_IR2 EQU 62h
26COMMAND_SPECIFIC_EOI_FOR_IR3 EQU 63h
27COMMAND_SPECIFIC_EOI_FOR_IR4 EQU 64h
28COMMAND_SPECIFIC_EOI_FOR_IR5 EQU 65h
29COMMAND_SPECIFIC_EOI_FOR_IR6 EQU 66h
30COMMAND_SPECIFIC_EOI_FOR_IR7 EQU 67h
31COMMAND_SET_SPECIAL_MASK_MODE EQU 68h
32COMMAND_SET_ROTATE_IN_AUTOMATIC_EOI_MODE EQU 80h
33COMMAND_ROTATE_ON_NONSPECIFIC_EOI EQU 0A0h
34COMMAND_IR0_LOWEST_PRIORITY EQU 0C0h
35COMMAND_IR1_LOWEST_PRIORITY EQU 0C1h
36COMMAND_IR2_LOWEST_PRIORITY EQU 0C2h
37COMMAND_IR3_LOWEST_PRIORITY EQU 0C3h
38COMMAND_IR4_LOWEST_PRIORITY EQU 0C4h
39COMMAND_IR5_LOWEST_PRIORITY EQU 0C5h
40COMMAND_IR6_LOWEST_PRIORITY EQU 0C6h
41COMMAND_IR7_LOWEST_PRIORITY EQU 0C7h
42COMMAND_EOI_AND_IR0_LOWEST_PRIORITY EQU 0E0h
43COMMAND_EOI_AND_IR1_LOWEST_PRIORITY EQU 0E1h
44COMMAND_EOI_AND_IR2_LOWEST_PRIORITY EQU 0E2h
45COMMAND_EOI_AND_IR3_LOWEST_PRIORITY EQU 0E3h
46COMMAND_EOI_AND_IR4_LOWEST_PRIORITY EQU 0E4h
47COMMAND_EOI_AND_IR5_LOWEST_PRIORITY EQU 0E5h
48COMMAND_EOI_AND_IR6_LOWEST_PRIORITY EQU 0E6h
49COMMAND_EOI_AND_IR7_LOWEST_PRIORITY EQU 0E7h
50
51
52%endif ; INT_CONTROLLER_INC
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