| [152] | 1 | ; Project name : XTIDE Universal BIOS
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| 2 | ; Description : Equates for 8259 Interrupt Controllers.
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| 3 | %ifndef INT_CONTROLLER_INC
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| 4 | %define INT_CONTROLLER_INC
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| [3] | 5 |
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| 6 | ; 8259 Master and Slave Interrupt Controller Ports
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| [152] | 7 | MASTER_8259_IRR_AND_ISR_in EQU 20h ; Interrupt Request Register / Interrupt In-Service Register
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| 8 | MASTER_8259_COMMAND_out EQU 20h ; Command output
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| 9 | MASTER_8259_IMR EQU 21h ; Interrupt Mask Register
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| 10 | MASTER_8259_INIT_out EQU 21h ; Initialization Command Parameters
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| 11 | SLAVE_8259_IRR_AND_ISR_in EQU 0A0h ; Interrupt Request Register / Interrupt In-Service Register
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| 12 | SLAVE_8259_COMMAND_out EQU 0A0h ; Command output
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| 13 | SLAVE_8259_IMR EQU 0A1h ; Interrupt Mask Register
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| 14 | SLAVE_8259_INIT_out EQU 0A1h ; Initialization Command Parameters
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| [3] | 15 |
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| [152] | 16 | ; 8259 Interrupt Controller Commands
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| 17 | COMMAND_CLEAR_ROTATE_IN_AUTOMATIC_EOI_MODE EQU 00h
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| 18 | COMMAND_READ_INTERRUPT_REQUEST_REGISTER EQU 0Ah
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| 19 | COMMAND_READ_INTERRUPT_INSERVICE_REGISTER EQU 0Bh
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| 20 | COMMAND_END_OF_INTERRUPT EQU 20h
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| 21 | COMMAND_NO_OPERATION EQU 40h
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| 22 | COMMAND_CLEAR_SPECIAL_MASK_MODE EQU 48h
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| 23 | COMMAND_SPECIFIC_EOI_FOR_IR0 EQU 60h
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| 24 | COMMAND_SPECIFIC_EOI_FOR_IR1 EQU 61h
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| 25 | COMMAND_SPECIFIC_EOI_FOR_IR2 EQU 62h
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| 26 | COMMAND_SPECIFIC_EOI_FOR_IR3 EQU 63h
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| 27 | COMMAND_SPECIFIC_EOI_FOR_IR4 EQU 64h
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| 28 | COMMAND_SPECIFIC_EOI_FOR_IR5 EQU 65h
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| 29 | COMMAND_SPECIFIC_EOI_FOR_IR6 EQU 66h
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| 30 | COMMAND_SPECIFIC_EOI_FOR_IR7 EQU 67h
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| 31 | COMMAND_SET_SPECIAL_MASK_MODE EQU 68h
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| 32 | COMMAND_SET_ROTATE_IN_AUTOMATIC_EOI_MODE EQU 80h
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| 33 | COMMAND_ROTATE_ON_NONSPECIFIC_EOI EQU 0A0h
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| 34 | COMMAND_IR0_LOWEST_PRIORITY EQU 0C0h
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| 35 | COMMAND_IR1_LOWEST_PRIORITY EQU 0C1h
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| 36 | COMMAND_IR2_LOWEST_PRIORITY EQU 0C2h
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| 37 | COMMAND_IR3_LOWEST_PRIORITY EQU 0C3h
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| 38 | COMMAND_IR4_LOWEST_PRIORITY EQU 0C4h
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| 39 | COMMAND_IR5_LOWEST_PRIORITY EQU 0C5h
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| 40 | COMMAND_IR6_LOWEST_PRIORITY EQU 0C6h
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| 41 | COMMAND_IR7_LOWEST_PRIORITY EQU 0C7h
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| 42 | COMMAND_EOI_AND_IR0_LOWEST_PRIORITY EQU 0E0h
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| 43 | COMMAND_EOI_AND_IR1_LOWEST_PRIORITY EQU 0E1h
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| 44 | COMMAND_EOI_AND_IR2_LOWEST_PRIORITY EQU 0E2h
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| 45 | COMMAND_EOI_AND_IR3_LOWEST_PRIORITY EQU 0E3h
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| 46 | COMMAND_EOI_AND_IR4_LOWEST_PRIORITY EQU 0E4h
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| 47 | COMMAND_EOI_AND_IR5_LOWEST_PRIORITY EQU 0E5h
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| 48 | COMMAND_EOI_AND_IR6_LOWEST_PRIORITY EQU 0E6h
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| 49 | COMMAND_EOI_AND_IR7_LOWEST_PRIORITY EQU 0E7h
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| [3] | 50 |
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| 51 |
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| [152] | 52 | %endif ; INT_CONTROLLER_INC
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