source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/EBIOS.inc@ 537

Last change on this file since 537 was 536, checked in by krille_n_@…, 12 years ago

Changes:

  • Added support for the Silicon Valley Computer ADP50L controller (and possibly other IDE controllers from SVC using memory mapped I/O). Please note that this has not been tested in any way since I don't have any of these cards myself (make backups before trying this on drives with important data). Also, *if* it works, make sure it works reliably (stress test the disk system). Some things you should know: 1) Autodetection for this controller has not been added to XTIDECFG, you need to manually select the "SVC ADP50L" controller (and possibly change the BIOS segment address if not using the default of C800h). 2) The memory mapped I/O window is inside the ROM address space of the controller. The XTIDE Universal BIOS currently do not support this so that means you need to use another ROM (for example, an XTIDE or XTCF card or the BOOT ROM of a NIC). This presents another problem, the original ADP50L BIOS needs to be disabled somehow to avoid conflicts. Either pull the ROM chip or disable the BIOS by removing jumper J3. Note, I have no idea if any of this will actually work. It's basically a shot in the dark.
File size: 4.7 KB
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1; Project name : XTIDE Universal BIOS
2; Description : Equates used in Enhanced INT 13h functions (EBIOS).
3
4;
5; XTIDE Universal BIOS and Associated Tools
6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
12;
13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
19
20%ifndef EBIOS_INC
21%define EBIOS_INC
22
23; EBIOS specification returned by INT 13h, AH=41h
24
25EDD_V1_1 EQU 21h ; 21h = EDD version 1.1
26EBIOS_VERSION EQU EDD_V1_1
27
28; Support bits returned by INT 13h, AH=41h
29ENHANCED_DRIVE_ACCESS_SUPPORT EQU (1<<0) ; 41h, 42h, 43h 44h, 47h and 48h are available
30DRIVE_LOCKING_AND_EJECTING_SUPPORT EQU (1<<1) ; 41h, 45h, 46h, 48h, 49h are available and INT 15h, AH=52h
31ENHANCED_DISK_DRIVE_SUPPORT EQU (1<<2) ; 41h, 48h, 4Eh are available (EDD)
32
33
34; Extended Drive Information returned by AH=48h
35struc EDRIVE_INFO
36 .wSize resb 2 ; 0, Size of this buffer, at least 26
37 .wFlags resb 2 ; 2, Information flags
38 .dwCylinders resb 4 ; 4, Total number of addressable cylinders
39 .dwHeads resb 4 ; 8, Total number of addressable heads
40 .dwSectorsPerTrack resb 4 ; 12, Number of sectors per track
41 .qwTotalSectors resb 8 ; 16, Total number of addressable sectors
42 .wSectorSize resb 2 ; 24, Number of bytes per sector
43 .fpDPTE resb 4 ; 26, Optional pointer to Device Parameter Table Extension
44endstruc
45
46MINIMUM_EDRIVEINFO_SIZE EQU 26 ; 26 bytes does not include EDD pointer
47EDRIVEINFO_SIZE_WITH_DPTE EQU EDRIVE_INFO_size
48
49; Flags for EDRIVE_INFO.wFlags
50FLG_DMA_BOUNDARY_ERRORS_HANDLED_BY_BIOS EQU (1<<0)
51FLG_CHS_INFORMATION_IS_VALID EQU (1<<1)
52FLG_REMOVABLE_DRIVE EQU (1<<2)
53FLG_WRITE_WITH_VERIFY_SUPPORTED EQU (1<<3)
54FLG_CHANGE_LINE_SUPPORT EQU (1<<4) ; Removable media only
55FLG_LOCKABLE EQU (1<<5) ; Removable media only
56FLG_NO_MEDIA_PRESENT_AND_CHS_SET_TO_MAX EQU (1<<6) ; Removable media only
57
58
59; Device Parameter Table Extension
60struc DPTE
61 .wBasePort resb 2 ; 0, Command Block Base Port Address
62 .wControlBlockPort resb 2 ; 2, Control Block Base Port Address
63 .bDrvnhead resb 1 ; 4, Drive and Head Select Register upper nibble
64 .bBiosVendor resb 1 ; 5, BIOS Vendor Specific
65 .bIRQ resb 1 ; 6, IRQ for this device
66 .bBlockSize resb 1 ; 7, Current block size in sectors
67 .bDmaChannelAndType resb 1 ; 8, DMA information
68 .bPioMode resb 1 ; 9, PIO mode
69 .wFlags resb 2 ; 10, BIOS selected hardware specific option flags
70 .wReserved resb 2 ; 12, Reserved. Must be zero.
71 .bRevision resb 1 ; 14, Revision level of this table (11h)
72 .bChecksum resb 1 ; 15, Checksum, 2's complement of the sum of bytes 0-14
73endstruc
74
75; Flags for DPTE.wFlags
76FLG_FAST_PIO_ENABLED EQU (1<<0) ; Set if using PIO mode 1 or above (DPTE.bPioMode is valid when set)
77FLG_DMA_ENABLED EQU (1<<1) ; Set if DMA enabled (DPTE.bDmaChannelAndType is valid when set)
78FLG_BLOCK_MODE_ENABLED EQU (1<<2) ; Set if Block Mode transfers are enabled (DPTE.bBlockSize is valid when set)
79FLG_CHS_TRANSLATION_ENABLED EQU (1<<3) ; Set for drives with more than 1024 cylinders
80FLG_LBA_TRANSLATION_ENABLED EQU (1<<4) ; Set when LBA addresses from DAP are passed directly to the drive
81FLG_REMOVABLE_MEDIA EQU (1<<5)
82FLG_ATAPI_DEVICE EQU (1<<6)
83FLG_32BIT_XFER_MODE EQU (1<<7) ; Set when using 32-bit data transfers
84FLG_ATAPI_USES_IRQ EQU (1<<8) ; ATAPI Device uses IRQ for data transfers
85; L-CHS translation type for old INT 13h (when FLG_CHS_TRANSLATION_ENABLED is set)
86MASK_CHS_TRANSLATION_TYPE EQU (3<<TRANSLATION_TYPE_FIELD_POSITION)
87 TRANSLATION_TYPE_FIELD_POSITION EQU 9
88 BIT_SHIFT_TRANSLATION EQU 0 ; LARGE
89 LBA_ASSISTED_TRANSLATION EQU 1 ; Assisted LBA
90 ; 2 = reserved
91 VENDOR_SPECIFIC_TRANSLATION EQU 3
92
93
94DPTE_REVISION EQU 11h
95
96
97; Disk Address Packet for read, write and verify functions
98struc DAP
99 .bSize resb 1 ; 0, Size of this packet in bytes
100 .bReservedAt1 resb 1 ; 1, Currently unused, must be zero
101 .wSectorCount resb 2 ; 2, Number of sectors to process (0...127)
102 .dwMemoryAddress:
103 .wOffset resb 2 ; 4, Memory offset for transfer
104 .wSegment resb 2 ; 6, Memory segment for transfer
105 .qwLBA resb 8 ; 8, Starting sector for transfer
106endstruc
107
108MINIMUM_DAP_SIZE EQU 16
109
110
111%endif ; EBIOS_INC
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