1 | ; Project name : XTIDE Universal BIOS |
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2 | ; Description : Defines for DPT structs containing custom |
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3 | ; Disk Parameter Table used by this BIOS. |
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4 | %ifndef CUSTOMDPT_INC |
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5 | %define CUSTOMDPT_INC |
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6 | |
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7 | ; Base DPT for all device types |
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8 | struc DPT ; 8 bytes |
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9 | ; General Disk Parameter Table related |
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10 | .wFlags: |
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11 | .bFlagsLow resb 1 |
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12 | .bFlagsHigh resb 1 |
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13 | .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive |
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14 | |
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15 | ; L-CHS to P-CHS and L-CHS to LBA28 conversion related |
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16 | .bLchsHeads resb 1 ; Number of L-CHS Heads (1...255) |
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17 | |
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18 | ; IDE Drive related |
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19 | .wPchsCylinders resb 2 ; Number of P-CHS (IDE) Cylinders (1...16383) |
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20 | .wPchsHeadsAndSectors: |
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21 | .bPchsHeads resb 1 ; Number of P-CHS (IDE) Heads (1...16) |
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22 | .bPchsSectors resb 1 ; Number of P-CHS (IDE) Sectors per Track (1...63) |
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23 | endstruc |
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24 | |
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25 | ; DPT for ATA devices |
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26 | struc DPT_ATA ; 8 + 2 bytes = 10 bytes |
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27 | .dpt resb DPT_size |
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28 | |
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29 | ; Block size is specified in sectors (1, 2, 4, 8, 16, 32 or 64). |
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30 | ; 128 is not allowed to prevent offset overflow during data transfer. |
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31 | .wSetAndMaxBlock: |
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32 | .bSetBlock resb 1 ; Current block size (at least 1) |
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33 | .bMaxBlock resb 1 ; Maximum block size, 0 = block mode not supported |
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34 | endstruc |
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35 | |
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36 | LARGEST_DPT_SIZE EQU DPT_ATA_size |
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37 | |
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38 | |
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39 | ; Bit definitions for DPT.bFlagsLow |
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40 | MASKL_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4) |
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41 | FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive |
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42 | MASKL_DPT_ADDRESSING_MODE EQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA) |
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43 | FLGL_DPT_ENABLE_IRQ EQU (1<<7) |
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44 | |
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45 | ; Bit definitions for DPT.bFlagsHigh |
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46 | FLGH_DPT_REVERSED_A0_AND_A3 EQU (1<<0) ; XTIDE mod, Address lines 0 and 3 reversed |
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47 | FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Use block transfer commands (must be bit 1!) |
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48 | FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Serial Port Device |
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49 | FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Set when waiting for IRQ |
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50 | FLGH_DPT_RESET_nDRDY EQU (1<<4) ; Drive ready to accept commands |
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51 | FLGH_DPT_RESET_nINITPRMS EQU (1<<5) ; Initialize Device Parameters successfull |
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52 | FLGH_DPT_RESET_nRECALIBRATE EQU (1<<6) ; Recalibrate successfull |
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53 | FLGH_DPT_RESET_nSETBLOCK EQU (1<<7) ; Initialize Block Mode successfull |
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54 | MASKH_DPT_RESET EQU 0F0h |
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55 | |
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56 | ; Addressing modes for DPT.wFlags |
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57 | ADDRESSING_MODE_FIELD_POSITION EQU 5 |
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58 | ADDRESSING_MODE_LCHS EQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes) |
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59 | ADDRESSING_MODE_PCHS EQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes) |
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60 | ADDRESSING_MODE_LBA28 EQU 2 ; 28-bit LBA Addressing Mode |
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61 | ADDRESSING_MODE_LBA48 EQU 3 ; 48-bit LBA Addressing Mode |
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62 | |
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63 | |
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64 | %endif ; CUSTOMDPT_INC |
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