source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc@ 476

Last change on this file since 476 was 474, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Drive detection now displays autodetected XT-CF port and skips slave drives for XT-CF.
  • AH=1Eh no longer tries to disable 8-bit mode for memory mapped and DMA transfer modes.
  • Preparations to implement DMA.
File size: 5.4 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Defines for DPT structs containing custom
3; Disk Parameter Table used by this BIOS.
4
5;
6; XTIDE Universal BIOS and Associated Tools
7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17; GNU General Public License for more details.
18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
21%ifndef CUSTOMDPT_INC
22%define CUSTOMDPT_INC
23
24; Base DPT for all device types
25struc DPT
26 ; General Disk Parameter Table related
27 .wFlags:
28 .bFlagsLow resb 1
29 .bFlagsHigh resb 1
30 .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive
31 .bInitError resb 1 ; Flags for AH=09h initialization errors
32 .wBasePort resb 2 ; Segment for JR-IDE/ISA
33
34 ; CHS variables
35 .wLchsCylinders resb 2 ; (1...1027, yes 1027)
36 .wLchsHeadsAndSectors:
37 .bLchsHeads resb 1 ; (1...255)
38 .bLchsSectorsPerTrack resb 1 ; (1...63)
39 .bPchsHeads resb 1 ; (1...16)
40
41 ; LBA and remaining P-CHS variables
42%ifdef MODULE_EBIOS
43 .bPchsSectorsPerTrack resb 1
44 .wPchsCylinders resb 2
45 .twLbaSectors resb 6 ; 48-bit sector count for LBA addressing
46%endif
47 alignb 2 ; WORD alignent for DPT_SERIAL or DPT_ATA
48endstruc
49
50 ; Bit definitions for DPT.bFlagsLow
51 MASKL_DPT_CHS_SHIFT_COUNT EQU (3<<0) ; Bits 0...1, P-CHS to L-CHS bit shift count (0...3)
52 MASKL_DPT_TRANSLATEMODE EQU MASK_DRVPARAMS_TRANSLATEMODE ; Bits 2...3, NORMAL, LARGE or Assisted LBA addressing mode
53 FLGL_DPT_ASSISTED_LBA EQU (1<<(TRANSLATEMODE_FIELD_POSITION+1))
54 FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; Bit 4, Drive is a Slave Drive
55%ifdef MODULE_IRQ
56 FLGL_DPT_ENABLE_IRQ EQU (1<<5) ; Bit 5, Enable IRQ
57%endif
58%ifdef MODULE_EBIOS
59 FLGL_DPT_LBA_AND_EBIOS_SUPPORTED EQU FLG_DRVNHEAD_LBA ; Bit 6, Drive supports LBA and so EBIOS functions can be supported
60 FLGL_DPT_LBA48 EQU (1<<7) ; Bit 7, Drive supports 48-bit LBA (Must be bit 7!)
61%endif
62
63
64 ; Bit definitions for DPT.bFlagsHigh
65 FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Bit 1, Use block transfer commands (must be bit 1!)
66%ifdef MODULE_SERIAL
67 FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Bit 2, Serial Port Device
68%endif
69%ifdef MODULE_IRQ
70 FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Bit 3, Set when waiting for IRQ
71%endif
72%ifdef MODULE_FEATURE_SETS
73 FLGH_DPT_POWER_MANAGEMENT_SUPPORTED EQU (1<<5) ; Bit 4, Drive supports power management
74%endif
75%ifdef MODULE_ADVANCED_ATA
76 FLGH_DPT_IORDY EQU (1<<7) ; Bit 5, Controller and Drive supports IORDY
77%endif
78
79 ; Serial device only
80%ifdef MODULE_SERIAL_FLOPPY
81 FLGH_DPT_SERIAL_FLOPPY EQU (1<<4)
82 FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h
83 FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 5
84%endif
85
86
87 ; Flags for DPT_ADVANCED_ATA.bInitError
88 FLG_INITERROR_FAILED_TO_SELECT_DRIVE EQU (1<<0)
89 FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS EQU (1<<1)
90 FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE EQU (1<<2)
91 FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE EQU (1<<3)
92 FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE EQU (1<<4)
93 FLG_INITERROR_FAILED_TO_SET_PIO_MODE EQU (1<<5)
94 FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER EQU (1<<6)
95 FLG_INITERROR_FAILED_TO_SET_XTCF_MODE EQU (1<<7)
96
97
98
99; DPT for ATA devices
100struc DPT_ATA
101 .dpt resb DPT_size
102 .bDevice resb 1 ; Device Type from IDEVARS (overrided when 32-bit controller detected)
103 .bBlockSize resb 1 ; Current block size in sectors (do not set to zero!)
104endstruc
105
106
107
108; Additional variables needed to initialize and reset Advanced IDE Controllers.
109; EBDA must be reserved for DPTs when using these!
110%ifdef MODULE_ADVANCED_ATA
111struc DPT_ADVANCED_ATA
112 .dpt_ata resb DPT_ATA_size
113 .wControllerID resb 2 ; Controller specific ID WORD (from Advanced Controller detection)
114 .wControllerBasePort resb 2 ; Advanced Controller port (not IDE port)
115 .wMinPioCycleTime resb 2 ; Minimum PIO Cycle Time in ns
116 .bPioMode resb 1 ; Best supported PIO mode
117 alignb 2
118endstruc
119%endif
120
121
122; DPT for Serial devices
123%ifdef MODULE_SERIAL
124struc DPT_SERIAL
125 .dpt resb DPT_size
126 .wSerialPortAndBaud:
127 .bSerialPort resb 1 ; Serial connection I/O port address, divided by 4
128 .bSerialBaud resb 1 ; Serial connection baud rate divisor
129endstruc
130
131; On performance critical situations we compare DPT_ATA.bDevice without checking FLGH_DPT_SERIAL_DEVICE
132; first! DPT_ATA.bDevice uses small values so there will be no problems.
133%if DPT_SERIAL.bSerialPort <> DPT_ATA.bDevice
134 %error "DPT_ATA.bDevice and DPT_SERIAL.bSerialPort must be in same offsets!"
135%endif
136%endif
137
138
139; This is the common size for all DPTs. All DPTs must be equal size.
140%ifdef MODULE_ADVANCED_ATA
141 LARGEST_DPT_SIZE EQU DPT_ADVANCED_ATA_size
142%else
143 LARGEST_DPT_SIZE EQU DPT_ATA_size
144%endif
145
146
147 ; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
148 ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
149 MAX_LCHS_CYLINDERS EQU 1024
150 LBA_ASSIST_SPT EQU 63
151
152
153%endif ; CUSTOMDPT_INC
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