| 1 | ; Project name : XTIDE Universal BIOS
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| 2 | ; Description : Defines for DPT structs containing custom
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| 3 | ; Disk Parameter Table used by this BIOS.
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| 4 |
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| 5 | ;
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| 6 | ; XTIDE Universal BIOS and Associated Tools
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| 7 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
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| 8 | ;
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| 9 | ; This program is free software; you can redistribute it and/or modify
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| 10 | ; it under the terms of the GNU General Public License as published by
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| 11 | ; the Free Software Foundation; either version 2 of the License, or
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| 12 | ; (at your option) any later version.
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| 13 | ;
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| 14 | ; This program is distributed in the hope that it will be useful,
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| 15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 17 | ; GNU General Public License for more details.
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| 18 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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| 19 | ;
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| 20 |
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| 21 | %ifndef CUSTOMDPT_INC
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| 22 | %define CUSTOMDPT_INC
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| 23 |
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| 24 | ; Base DPT for all device types
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| 25 | struc DPT
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| 26 | ; General Disk Parameter Table related (Bytes 0...3)
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| 27 | .wFlags:
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| 28 | .bFlagsLow resb 1
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| 29 | .bFlagsHigh resb 1
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| 30 | .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive
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| 31 | .bInitError resb 1 ; Flags for AH=09h initialization errors
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| 32 |
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| 33 | ; CHS variables (Bytes 4...8)
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| 34 | .wLchsCylinders resb 2 ; (1...1027, yes 1027)
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| 35 | .wLchsHeadsAndSectors:
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| 36 | .bLchsHeads resb 1 ; (1...255)
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| 37 | .bLchsSectorsPerTrack resb 1 ; (1...63)
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| 38 | .bPchsHeads resb 1 ; (1...16)
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| 39 |
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| 40 | ; LBA and remaining P-CHS variables
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| 41 | %ifdef MODULE_EBIOS
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| 42 | .bPchsSectorsPerTrack resb 1
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| 43 | .wPchsCylinders resb 2
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| 44 | .twLbaSectors resb 6 ; 48-bit sector count for LBA addressing
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| 45 | %endif
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| 46 |
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| 47 | %ifdef MODULE_8BIT_IDE
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| 48 | .wXTCFport resb 2 ; Autodetected XT-CF port
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| 49 | %endif
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| 50 | alignb 2 ; WORD alignent for DPT_SERIAL or DPT_ATA
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| 51 | endstruc
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| 52 |
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| 53 | ; Bit definitions for DPT.bFlagsLow
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| 54 | MASKL_DPT_CHS_SHIFT_COUNT EQU (3<<0) ; Bits 0...1, P-CHS to L-CHS bit shift count (0...3)
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| 55 | MASKL_DPT_TRANSLATEMODE EQU MASK_DRVPARAMS_TRANSLATEMODE ; Bits 2...3, NORMAL, LARGE or Assisted LBA addressing mode
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| 56 | FLGL_DPT_ASSISTED_LBA EQU (1<<(TRANSLATEMODE_FIELD_POSITION+1))
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| 57 | FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; Bit 4, Drive is a Slave Drive
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| 58 | %ifdef MODULE_IRQ
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| 59 | FLGL_DPT_ENABLE_IRQ EQU (1<<5) ; Bit 5, Enable IRQ
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| 60 | %endif
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| 61 | %ifdef MODULE_EBIOS
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| 62 | FLGL_DPT_LBA_AND_EBIOS_SUPPORTED EQU FLG_DRVNHEAD_LBA ; Bit 6, Drive supports LBA and so EBIOS functions can be supported
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| 63 | FLGL_DPT_LBA48 EQU (1<<7) ; Bit 7, Drive supports 48-bit LBA (Must be bit 7!)
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| 64 | %endif
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| 65 |
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| 66 |
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| 67 | ; Bit definitions for DPT.bFlagsHigh
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| 68 | FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Bit 1, Use block transfer commands (must be bit 1!)
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| 69 | %ifdef MODULE_SERIAL
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| 70 | FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Bit 2, Serial Port Device
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| 71 | %endif
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| 72 | %ifdef MODULE_IRQ
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| 73 | FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Bit 3, Set when waiting for IRQ
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| 74 | %endif
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| 75 | %ifdef MODULE_FEATURE_SETS
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| 76 | FLGH_DPT_POWER_MANAGEMENT_SUPPORTED EQU (1<<5) ; Bit 4, Drive supports power management
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| 77 | %endif
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| 78 | %ifdef MODULE_ADVANCED_ATA
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| 79 | FLGH_DPT_IORDY EQU (1<<7) ; Bit 5, Controller and Drive supports IORDY
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| 80 | %endif
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| 81 |
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| 82 | ; Serial device only
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| 83 | %ifdef MODULE_SERIAL_FLOPPY
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| 84 | FLGH_DPT_SERIAL_FLOPPY EQU (1<<4)
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| 85 | FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h
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| 86 | FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 5
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| 87 | %endif
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| 88 |
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| 89 |
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| 90 | ; Flags for DPT_ADVANCED_ATA.bInitError
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| 91 | FLG_INITERROR_FAILED_TO_SELECT_DRIVE EQU (1<<0)
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| 92 | FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS EQU (1<<1)
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| 93 | FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE EQU (1<<2)
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| 94 | FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE EQU (1<<3)
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| 95 | FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE EQU (1<<4)
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| 96 | FLG_INITERROR_FAILED_TO_SET_PIO_MODE EQU (1<<5)
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| 97 | FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER EQU (1<<6)
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| 98 | FLG_INITERROR_FAILED_TO_ENABLE_8BIT_PIO_MODE EQU (1<<7)
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| 99 |
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| 100 |
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| 101 |
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| 102 | ; DPT for ATA devices
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| 103 | struc DPT_ATA ; 10/18 bytes + 2 bytes = 12/20 bytes
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| 104 | .dpt resb DPT_size
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| 105 | .bBlockSize resb 1 ; Current block size in sectors (do not set to zero!)
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| 106 | .bDevice resb 1 ; Device Type from IDEVARS (overrided when 32-bit controller detected)
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| 107 | endstruc
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| 108 |
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| 109 |
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| 110 |
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| 111 | ; Additional variables needed to initialize and reset Advanced IDE Controllers.
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| 112 | ; EBDA must be reserved for DPTs when using these!
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| 113 | %ifdef MODULE_ADVANCED_ATA
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| 114 | struc DPT_ADVANCED_ATA ; 12/20 bytes + 8 bytes = 20/28 bytes
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| 115 | .dpt_ata resb DPT_ATA_size
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| 116 | .wControllerID resb 2 ; Controller specific ID WORD (from Advanced Controller detection)
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| 117 | .wControllerBasePort resb 2 ; Advanced Controller port (not IDE port)
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| 118 | .wMinPioCycleTime resb 2 ; Minimum PIO Cycle Time in ns
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| 119 | .bPioMode resb 1 ; Best supported PIO mode
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| 120 | alignb 2
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| 121 | endstruc
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| 122 | %endif
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| 123 |
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| 124 |
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| 125 | ; DPT for Serial devices
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| 126 | %ifdef MODULE_SERIAL
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| 127 | struc DPT_SERIAL ; 8/18 bytes + 2 bytes = 10/20 bytes
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| 128 | .dpt resb DPT_size
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| 129 | .wSerialPortAndBaud:
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| 130 | .bSerialPort resb 1 ; Serial connection I/O port address, divided by 4
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| 131 | .bSerialBaud resb 1 ; Serial connection baud rate divisor
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| 132 | endstruc
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| 133 | %endif
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| 134 |
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| 135 |
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| 136 | ; This is the common size for all DPTs. All DPTs must be equal size.
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| 137 | %ifdef MODULE_ADVANCED_ATA
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| 138 | LARGEST_DPT_SIZE EQU DPT_ADVANCED_ATA_size
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| 139 | %else
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| 140 | LARGEST_DPT_SIZE EQU DPT_ATA_size
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| 141 | %endif
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| 142 |
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| 143 |
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| 144 | ; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
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| 145 | ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
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| 146 | MAX_LCHS_CYLINDERS EQU 1024
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| 147 | LBA_ASSIST_SPT EQU 63
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| 148 |
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| 149 |
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| 150 | %endif ; CUSTOMDPT_INC
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