source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc@ 185

Last change on this file since 185 was 175, checked in by gregli@…, 13 years ago

ifdef of existing serial code, in preperation for checkin

File size: 2.8 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Defines for DPT structs containing custom
3; Disk Parameter Table used by this BIOS.
4%ifndef CUSTOMDPT_INC
5%define CUSTOMDPT_INC
6
7; Base DPT for all device types
8struc DPT ; 10 bytes
9 ; General Disk Parameter Table related
10 .wFlags:
11 .bFlagsLow resb 1
12 .bFlagsHigh resb 1
13 .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive
14%ifdef MODULE_SERIAL
15 .bSerialPortAndBaud resb 1 ; Packed I/O port and baud rate for serial drives
16%else
17 resb 1 ; without serial port support, alignment byte
18%endif
19
20 ; IDE Drive related
21 .dwCylinders resb 4 ; Number of Cylinders
22 .wHeadsAndSectors:
23 .bHeads resb 1 ; Number of Heads (1...255)
24 .bSectors resb 1 ; Number of Sectors per Track (1...63)
25endstruc
26
27; DPT for ATA devices
28struc DPT_ATA ; 10 + 2 bytes = 12 bytes
29 .dpt resb DPT_size
30
31 ; Block size is specified in sectors (1, 2, 4, 8, 16, 32 or 64).
32 ; 128 is not allowed to prevent offset overflow during data transfer.
33 .wSetAndMaxBlock:
34 .bSetBlock resb 1 ; Current block size (at least 1)
35 .bMaxBlock resb 1 ; Maximum block size, 0 = block mode not supported
36endstruc
37
38LARGEST_DPT_SIZE EQU DPT_ATA_size
39
40
41; Bit definitions for DPT.bFlagsLow
42MASKL_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4)
43FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive
44MASKL_DPT_ADDRESSING_MODE EQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA)
45FLGL_DPT_ENABLE_IRQ EQU (1<<7)
46
47; Bit definitions for DPT.bFlagsHigh
48FLGH_DPT_REVERSED_A0_AND_A3 EQU (1<<0) ; XTIDE mod, Address lines 0 and 3 reversed
49FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Use block transfer commands (must be bit 1!)
50%ifdef MODULE_SERIAL
51FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Serial Port Device
52%endif
53FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Set when waiting for IRQ
54FLGH_DPT_RESET_nDRDY EQU (1<<4) ; Drive ready to accept commands
55FLGH_DPT_RESET_nINITPRMS EQU (1<<5) ; Initialize Device Parameters successfull
56FLGH_DPT_RESET_nRECALIBRATE EQU (1<<6) ; Recalibrate successfull
57FLGH_DPT_RESET_nSETBLOCK EQU (1<<7) ; Initialize Block Mode successfull
58MASKH_DPT_RESET EQU 0F0h
59
60; Addressing modes for DPT.wFlags
61ADDRESSING_MODE_FIELD_POSITION EQU 5
62ADDRESSING_MODE_LCHS EQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes)
63ADDRESSING_MODE_PCHS EQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes)
64ADDRESSING_MODE_LBA28 EQU 2 ; 28-bit LBA Addressing Mode
65ADDRESSING_MODE_LBA48 EQU 3 ; 48-bit LBA Addressing Mode
66
67; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
68; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
69MAX_LCHS_CYLINDERS EQU 1024
70LBA_ASSIST_SPT EQU 63
71
72
73%endif ; CUSTOMDPT_INC
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