| [99] | 1 | ; Project name : XTIDE Universal BIOS
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| [3] | 2 | ; Description : Defines for DPT structs containing custom
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| 3 | ; Disk Parameter Table used by this BIOS.
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| 4 | %ifndef CUSTOMDPT_INC
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| 5 | %define CUSTOMDPT_INC
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| 6 |
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| [150] | 7 | ; Base DPT for all device types
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| 8 | struc DPT ; 8 bytes
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| [3] | 9 | ; General Disk Parameter Table related
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| [150] | 10 | .wFlags resb 2
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| 11 | .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive
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| [3] | 12 |
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| [150] | 13 | ; L-CHS to P-CHS and L-CHS to LBA28 conversion related
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| 14 | .bLchsHeads resb 1 ; Number of L-CHS Heads (1...255)
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| [3] | 15 |
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| [150] | 16 | ; IDE Drive related
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| 17 | .wPchsCylinders resb 2 ; Number of P-CHS (IDE) Cylinders (1...16383)
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| 18 | .wPchsHeadsAndSectors:
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| 19 | .bPchsHeads resb 1 ; Number of P-CHS (IDE) Heads (1...16)
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| 20 | .bPchsSectors resb 1 ; Number of P-CHS (IDE) Sectors per Track (1...63)
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| 21 | endstruc
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| [3] | 22 |
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| [150] | 23 | ; DPT for ATA devices
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| 24 | struc DPT_ATA ; 8 + 2 bytes = 10 bytes
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| 25 | .dpt resb DPT_size
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| 26 |
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| 27 | ; Block size is specified in sectors (1, 2, 4, 8, 16, 32 or 64).
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| 28 | ; 128 is not allowed to prevent offset overflow during data transfer.
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| [3] | 29 | .wSetAndMaxBlock:
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| [150] | 30 | .bSetBlock resb 1 ; Current block size (at least 1)
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| 31 | .bMaxBlock resb 1 ; Maximum block size, 0 = block mode not supported
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| [3] | 32 | endstruc
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| 33 |
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| [150] | 34 | LARGEST_DPT_SIZE EQU DPT_ATA_size
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| [3] | 35 |
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| 36 |
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| [150] | 37 | ; Bit definitions for DPT.wFlags
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| 38 | MASK_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4)
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| 39 | FLG_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive
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| 40 | MASK_DPT_ADDRESSING_MODE EQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA)
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| 41 | FLG_DPT_ENABLE_IRQ EQU (1<<7)
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| 42 | FLG_DPT_REVERSED_A0_AND_A3 EQU (1<<8) ; XTIDE mod, Address lines 0 and 3 reversed
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| 43 | FLG_DPT_SERIAL_DEVICE EQU (1<<9) ; Serial Port Device
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| 44 | FLG_DPT_BLOCK_MODE_SUPPORTED EQU (1<<10) ; Use block transfer commands
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| [152] | 45 | FLG_DPT_INTERRUPT_IN_SERVICE EQU (1<<11) ; Set when waiting for IRQ
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| [150] | 46 | FLG_DPT_RESET_nDRDY EQU (1<<12) ; Drive ready to accept commands
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| 47 | FLG_DPT_RESET_nINITPRMS EQU (1<<13) ; Initialize Device Parameters successfull
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| 48 | FLG_DPT_RESET_nRECALIBRATE EQU (1<<14) ; Recalibrate successfull
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| 49 | FLG_DPT_RESET_nSETBLOCK EQU (1<<15) ; Initialize Block Mode successfull
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| 50 | MASK_DPT_RESET EQU 0F000h
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| [3] | 51 |
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| [150] | 52 | ; Addressing modes for DPT.wFlags
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| 53 | ADDRESSING_MODE_FIELD_POSITION EQU 5
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| 54 | ADDRESSING_MODE_LCHS EQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes)
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| 55 | ADDRESSING_MODE_PCHS EQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes)
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| 56 | ADDRESSING_MODE_LBA28 EQU 2 ; 28-bit LBA Addressing Mode
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| 57 | ADDRESSING_MODE_LBA48 EQU 3 ; 48-bit LBA Addressing Mode
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| [3] | 58 |
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| 59 |
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| 60 | %endif ; CUSTOMDPT_INC
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