source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/Controllers/XTCF.inc @ 479

Last change on this file since 479 was 479, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Simplified non-working DMA code (same problem continues).
File size: 2.9 KB
Line 
1; Project name  :   XTIDE Universal BIOS
2; Description   :   Lo-tech XT-CFv2 board specifications.
3;
4;                   More information at http://www.lo-tech.co.uk/wiki/Lo-tech_XT-CFv2_Board
5
6;
7; XTIDE Universal BIOS and Associated Tools
8; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
9;
10; This program is free software; you can redistribute it and/or modify
11; it under the terms of the GNU General Public License as published by
12; the Free Software Foundation; either version 2 of the License, or
13; (at your option) any later version.
14;
15; This program is distributed in the hope that it will be useful,
16; but WITHOUT ANY WARRANTY; without even the implied warranty of
17; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18; GNU General Public License for more details.     
19; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
20;
21
22%ifndef XTCF_INC
23%define XTCF_INC
24
25XTCF_DMA_MODE_MAX_BLOCK_SIZE        EQU     64      ; Sectors
26OFFSET_TO_CONTROL_BLOCK_REGISTERS   EQU     8
27
28; Possible base addresses. Note that all XT-CF IDE registers are SHL 1 compared
29; to standard IDE registers.
30XTCF_BASE_PORT_1                    EQU     200h
31XTCF_BASE_PORT_2                    EQU     240h
32XTCF_BASE_PORT_3                    EQU     300h    ; Default setting
33XTCF_BASE_PORT_4                    EQU     340h
34
35
36; XT-CF Control Register (do not SHL 1 these!)
37XTCF_CONTROL_REGISTER               EQU     1Fh
38XTCT_CONTROL_REGISTER_INVERTED_in   EQU     1Eh
39
40; Control Register contents:
41;
42; Control Register holds high byte from Sector Window segment if >= A0h
43; (First possible segment for Sector Window is A000h)
44;
45; 8-bit PIO transfers (port I/O) are used if Control Register is zero.
46; Any other value means DMA transfers (using DMA channel 3).
47XTCF_8BIT_PIO_MODE                      EQU     0
48XTCF_DMA_MODE                           EQU     10h
49XTCF_MEMORY_MAPPED_MODE                 EQU     0A0h
50RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER   EQU     40h
51
52
53
54; Subcommands for AH=1Eh, Lo-tech XT-CF features.
55; Return values common for all subcommands:
56;       AH:     RET_HD_SUCCESS if drive is XT-CF
57;               RET_HD_INVALID if drive is not XT-CF
58;       CF:     0 if successful, 1 if error
59
60;--------------------------------------------------------------------
61; IS_THIS_DRIVE_XTCF
62;   Parameters:
63;       DL:     Drive Number
64;--------------------------------------------------------------------
65IS_THIS_DRIVE_XTCF                  EQU     0
66
67;--------------------------------------------------------------------
68; READ_XTCF_CONTROL_REGISTER_TO_DH
69;   Parameters:
70;       DL:     Drive Number
71;   Returns:
72;       DH:     XT-CF Control Register contents
73;--------------------------------------------------------------------
74READ_XTCF_CONTROL_REGISTER_TO_DH    EQU     1
75
76;--------------------------------------------------------------------
77; WRITE_DH_TO_XTCF_CONTROL_REGISTER
78;   Parameters:
79;       DH:     Byte to write to XT-CF Control Register
80;       DL:     Drive Number
81;--------------------------------------------------------------------
82WRITE_DH_TO_XTCF_CONTROL_REGISTER   EQU     2
83
84
85%endif ; XTCF_INC
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