1 | ; Project name : XTIDE Universal BIOS
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2 | ; Description : Lo-tech XT-CFv2 board specifications.
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3 | ;
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4 | ; More information at http://www.lo-tech.co.uk/XT-CF
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5 |
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6 | ;
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7 | ; XTIDE Universal BIOS and Associated Tools
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8 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
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9 | ;
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10 | ; This program is free software; you can redistribute it and/or modify
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11 | ; it under the terms of the GNU General Public License as published by
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12 | ; the Free Software Foundation; either version 2 of the License, or
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13 | ; (at your option) any later version.
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14 | ;
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15 | ; This program is distributed in the hope that it will be useful,
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16 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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17 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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18 | ; GNU General Public License for more details.
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19 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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20 | ;
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21 |
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22 | ; Modified by JJP for XT-CFv3 support, Mar-13
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23 |
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24 |
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25 | %ifndef XTCF_INC
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26 | %define XTCF_INC
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27 |
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28 | ; XT-CF requires that block must be less than 128 sectors (64 kiB) for DMA transfers.
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29 | ;
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30 | ; Note: XT-CFv3 DMA will not interfere with PC & PC/XT memory refresh,
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31 | ; since the XT-CFv3 detaches itself from the bus every 16 bytes transferred.
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32 | ;
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33 | XTCF_DMA_MODE_MAX_BLOCK_SIZE EQU 64 ; Sectors
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34 |
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35 | ; Possible base addresses. Note that all XT-CF IDE registers are SHL 1 compared
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36 | ; to standard IDE registers.
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37 | XTCF_BASE_PORT_1 EQU 200h
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38 | XTCF_BASE_PORT_2 EQU 240h
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39 | XTCF_BASE_PORT_3 EQU 300h ; Default setting
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40 | XTCF_BASE_PORT_4 EQU 340h
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41 |
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42 |
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43 | ; XT-CF Control Register (do not SHL 1 these!)
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44 | ; Note: XT-CFv3 control register is used *only* to raise DRQ. The register cannot be read.
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45 | ;
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46 | XTCF_CONTROL_REGISTER EQU 1Eh
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47 |
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48 | ; Transfer Mode Constants
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49 | ;
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50 | ; Available transfer modes depend on the controller. All XT-CF controllers
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51 | ; support 8-bit PIO, either with 8-bit or 16-bit instructions (i.e., data
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52 | ; can be fetched from the controller with REP INSW or REP INSB since A0 is
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53 | ; not decoded). However, errors in the implementation of the BIU on some
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54 | ; machines will prevent 16-bit instructions delivering data correctly.
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55 | ;
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56 | ; For XT-CFv3 adapter, DMA transfers are also supported via channel 3.
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57 | ;
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58 | ; XT-CFv3 cannot be distinguised by software, so user must decide and set
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59 | ; the mode via a call to Int 13h function 1Eh accordingly (see AH1E_XTCF.asm).
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60 | ;
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61 | XTCF_8BIT_PIO_MODE EQU 00h
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62 | XTCF_8BIT_PIO_MODE_WITH_BIU_OFFLOAD EQU 01h
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63 | XTCF_DMA_MODE EQU 02h
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64 |
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65 | ; Subcommands for AH=1Eh, Lo-tech XT-CF features.
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66 | ; Return values common for all subcommands:
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67 | ; AH: RET_HD_SUCCESS if drive is XT-CF
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68 | ; RET_HD_INVALID if drive is not XT-CF
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69 | ; CF: 0 if successful, 1 if error
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70 |
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71 | ;--------------------------------------------------------------------
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72 | ; IS_THIS_DRIVE_XTCF
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73 | ; Parameters:
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74 | ; DL: Drive Number
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75 | ;--------------------------------------------------------------------
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76 | IS_THIS_DRIVE_XTCF EQU 0
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77 |
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78 | ;--------------------------------------------------------------------
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79 | ; SET_XTCF_TRANSFER_MODE
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80 | ; Parameters:
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81 | ; DH: Mode to select, i.e. XTCF_8BIT_PIO_MODE
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82 | ; Note there's no way to know if an XT-CF adapter
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83 | ; supports DMA, so the user should enable DMA
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84 | ; only if a DMA-enabled XT-CFv3 is fitted.
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85 | ; DL: Drive Number
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86 | ;--------------------------------------------------------------------
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87 | SET_XTCF_TRANSFER_MODE EQU 1
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88 |
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89 | ;--------------------------------------------------------------------
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90 | ; GET_XTCF_TRANSFER_MODE
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91 | ; Parameters:
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92 | ; DL: Drive Number
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93 | ; Returns:
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94 | ; DH: One of the mode values listed above,
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95 | ; i.e. XTCF_8BIT_PIO_MODE
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96 | ; DL: Block mode sectors per block configured
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97 | ;--------------------------------------------------------------------
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98 | GET_XTCF_TRANSFER_MODE EQU 2
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99 |
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100 |
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101 | %endif ; XTCF_INC
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