source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/Controllers/XTCF.inc@ 550

Last change on this file since 550 was 545, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Integrated XT-CFv3 support by James Pearce.
  • XT-CFv2 memory mapped I/O and DMA modes are no longer supported (but PIO mode is).
File size: 3.7 KB
RevLine 
[470]1; Project name : XTIDE Universal BIOS
2; Description : Lo-tech XT-CFv2 board specifications.
3;
[545]4; More information at http://www.lo-tech.co.uk/XT-CF
[470]5
6;
[491]7; XTIDE Universal BIOS and Associated Tools
[526]8; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
[470]9;
10; This program is free software; you can redistribute it and/or modify
11; it under the terms of the GNU General Public License as published by
12; the Free Software Foundation; either version 2 of the License, or
13; (at your option) any later version.
[491]14;
[470]15; This program is distributed in the hope that it will be useful,
16; but WITHOUT ANY WARRANTY; without even the implied warranty of
17; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
[491]18; GNU General Public License for more details.
[470]19; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
20;
21
[545]22; Modified by JJP for XT-CFv3 support, Mar-13
23
24
[470]25%ifndef XTCF_INC
26%define XTCF_INC
27
[545]28; XT-CF requires that block must be less than 128 sectors (64 kiB) for DMA
29; transfers.
30;
31; Note: XT-CFv3 DMA will not interfere with PC & PC/XT memory refresh,
32; since the XT-CFv3 detaches itself from the bus every 16 bytes transferred.
33;
34XTCF_DMA_MODE_MAX_BLOCK_SIZE EQU 64 ; Sectors
[473]35
[470]36; Possible base addresses. Note that all XT-CF IDE registers are SHL 1 compared
37; to standard IDE registers.
38XTCF_BASE_PORT_1 EQU 200h
39XTCF_BASE_PORT_2 EQU 240h
40XTCF_BASE_PORT_3 EQU 300h ; Default setting
[471]41XTCF_BASE_PORT_4 EQU 340h
[470]42
43
44; XT-CF Control Register (do not SHL 1 these!)
[545]45; Note: XT-CFv3 control register is used *only* to raise DRQ. The register cannot be read.
46;
47XTCF_CONTROL_REGISTER EQU 1Eh
[470]48
[545]49; Transfer Mode Constants
[471]50;
[545]51; Available transfer modes depend on the controller. All XT-CF controllers
52; support 8-bit PIO, either with 8-bit or 16-bit instructions (i.e., data
53; can be fetched from the controller with REP INSW or REP INSB since A0 is
54; not decoded). However, errors in the implementation of the BIU on some
55; machines will prevent 16-bit instructions delivering data correctly.
[491]56;
[545]57; For XT-CFv3 adapter, DMA transfers are also supported via channel 3.
58;
59; XT-CFv3 cannot be distinguised by software, so user must decide and set
60; the mode via a call to Int 13h function 1Eh accordingly (see AH1E_XTCF.asm).
61;;
62XTCF_8BIT_PIO_MODE EQU 00h
63XTCF_8BIT_PIO_MODE_WITH_BIU_OFFLOAD EQU 01h
64XTCF_DMA_MODE EQU 02h
[470]65
[471]66; Subcommands for AH=1Eh, Lo-tech XT-CF features.
67; Return values common for all subcommands:
68; AH: RET_HD_SUCCESS if drive is XT-CF
69; RET_HD_INVALID if drive is not XT-CF
70; CF: 0 if successful, 1 if error
[470]71
[471]72;--------------------------------------------------------------------
73; IS_THIS_DRIVE_XTCF
74; Parameters:
75; DL: Drive Number
76;--------------------------------------------------------------------
77IS_THIS_DRIVE_XTCF EQU 0
78
79;--------------------------------------------------------------------
[545]80; SET_XTCF_TRANSFER_MODE
[471]81; Parameters:
[545]82; DH: Mode to select,
83; i.e. XTCF_8BIT_PIO_MODE
84; Note there's no way to know if an
85; XT-CF adapter supports DMA, so the
86; user should enable DMA only if a
87; DMA-enabled XT-CFv3 is fitted.
[471]88; DL: Drive Number
89;--------------------------------------------------------------------
[545]90SET_XTCF_TRANSFER_MODE EQU 1
[471]91
92;--------------------------------------------------------------------
[545]93; GET_XTCF_TRANSFER_MODE
[471]94; Parameters:
95; DL: Drive Number
[545]96; Returns:
97; DL: Block mode sectors per block
98; configured
99; DH: One of the mode values listed above,
100; i.e. XTCF_8BIT_PIO_MODE
[471]101;--------------------------------------------------------------------
[545]102GET_XTCF_TRANSFER_MODE EQU 2
[471]103
104
[470]105%endif ; XTCF_INC
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