1 | ; Project name : Emulation library
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2 | ; Description : Macros for emulating later x86 instruction with older
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3 | ; processors.
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4 | ; Macros are used so optimized builds could be done
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5 | ; easily for different processors.
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6 | ;
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7 | ; This file must be first to be included to
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8 | ; any source file.
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9 | %ifndef EMULATE_INC
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10 | %define EMULATE_INC
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11 |
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12 | ; Defines for processor support. Unsupported instructions will be
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13 | ; emulated using macros.
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14 | ; If using 286, define USE_186 and USE_286
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15 | ; If using 386, define USE_186, USE_286 and USE_386
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16 | ; If AT class PC is used (instead of XT), define USE_AT
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17 | ;%define USE_186 ; Define to use 18x/V20/V30 instructions
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18 | ;%define USE_286 ; Define to use 286 instructions
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19 | ;%define USE_386 ; Define to use 386 instructions
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20 | ;%define USE_AT ; Define for AT class machine
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21 | ; Above defines should be set on makefile!
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22 |
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23 | CPU 8086 ; Allow 8088/8086 instructions only
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24 | %ifdef USE_186
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25 | CPU 186 ; Allow instructions up to 188/186/V20/V30
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26 | %elifdef USE_286
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27 | CPU 286 ; Allow instructions up to 286
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28 | %elifdef USE_386
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29 | CPU 386 ; Allow instructions up to 386
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30 | %endif
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31 | BITS 16 ; Set 16 bit code generation
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32 |
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33 | ; Alignments for jump targets.
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34 | ; Following values are optimal for different processor types:
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35 | ; 286 and 386SX WORD (16-bit, 2 bytes)
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36 | ; 386DX and 486 DWORD (32-bit, 4 bytes)
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37 | ; Pentium and later QWORD (64-bit, 8 bytes)
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38 | %ifdef USE_AT
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39 | %ifdef USE_386
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40 | JUMP_ALIGN EQU 4
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41 | WORD_ALIGN EQU 2
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42 | %else ; USE_286
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43 | JUMP_ALIGN EQU 2
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44 | WORD_ALIGN EQU 2
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45 | %endif
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46 | %else ; XT
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47 | JUMP_ALIGN EQU 1
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48 | WORD_ALIGN EQU 1
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49 | %endif
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50 |
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51 | ;==========================================================================
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52 |
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53 | ;--------------------------------------------------------------------
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54 | ; Emulates BSF (Bit Scan Forward) instruction when necessary.
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55 | ; BSF is used to find index of least significant bit.
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56 | ;
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57 | ; eBSF
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58 | ; Parameters:
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59 | ; %1: Destination WORD Register for bit index (not CX or same as %2!)
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60 | ; %2: Source WORD operand where to search bit (not CX or same as %1!)
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61 | ; Returns:
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62 | ; %1: Index of highest order bit from %2
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63 | ; ZF: Set if %2 is zero
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64 | ; Cleared if %2 is non-zero
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65 | ; Corrupts registers:
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66 | ; Nothing
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67 | ;--------------------------------------------------------------------
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68 | %macro eBSF 2
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69 | %ifndef USE_386
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70 | push cx
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71 | cmp WORD %2, BYTE 0 ; Source operand is zero?
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72 | je SHORT %%Return ; If so, return with ZF set
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73 |
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74 | ; Set destination to zero and load mask for bit 0
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75 | xor %1, %1
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76 | mov cx, 1
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77 |
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78 | ALIGN JUMP_ALIGN
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79 | %%BitLoop:
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80 | test %2, cx ; Bit set?
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81 | jnz SHORT %%Return ; If so, return with ZF cleared
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82 | shl cx, 1 ; Prepare to test next bit
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83 | inc %1 ; Increment bit index
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84 | jmp SHORT %%BitLoop ; Loop until bit found
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85 | %%Return:
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86 | pop cx
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87 | ;-----------------------------------
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88 | %else
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89 | bsf %1, %2
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90 | %endif
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91 | %endmacro
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92 |
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93 |
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94 | ;--------------------------------------------------------------------
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95 | ; Emulates BSR (Bit Scan Reverse) instruction when necessary.
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96 | ; BSR is used to find index of most significant bit.
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97 | ;
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98 | ; eBSR
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99 | ; Parameters:
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100 | ; %1: Destination WORD Register for bit index (not CX or same as %2!)
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101 | ; %2: Source WORD operand where to search bit (not CX or same as %1!)
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102 | ; Returns:
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103 | ; %1: Index of highest order bit from %2
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104 | ; ZF: Set if %2 is zero
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105 | ; Cleared if %2 is non-zero
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106 | ; Corrupts registers:
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107 | ; Nothing
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108 | ;--------------------------------------------------------------------
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109 | %macro eBSR 2
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110 | %ifndef USE_386
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111 | push cx
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112 | cmp WORD %2, BYTE 0 ; Source operand is zero?
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113 | je SHORT %%Return ; If so, return with ZF set
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114 |
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115 | ; Load mask for highest order bit
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116 | mov cx, 1<<15
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117 | mov %1, 15
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118 |
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119 | ALIGN JUMP_ALIGN
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120 | %%BitLoop:
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121 | test %2, cx ; Bit set?
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122 | jnz SHORT %%Return ; If so, return with ZF cleared
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123 | shr cx, 1 ; Prepare to test next bit
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124 | dec %1 ; Decrement bit index
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125 | jmp SHORT %%BitLoop ; Loop until bit found
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126 | %%Return:
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127 | pop cx
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128 | ;-----------------------------------
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129 | %else
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130 | bsr %1, %2
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131 | %endif
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132 | %endmacro
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133 |
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134 |
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135 | ;--------------------------------------------------------------------
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136 | ; Conditional Move.
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137 | ;
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138 | ; eCMOVcc
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139 | ; Parameters:
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140 | ; %1: Destination data
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141 | ; %2: Source data
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142 | ; Returns:
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143 | ; Nothing
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144 | ; Corrupts registers:
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145 | ; Nothing
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146 | ;--------------------------------------------------------------------
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147 | %macro eCMOVC 2
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148 | jnc SHORT %%Return
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149 | mov %1, %2
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150 | %%Return:
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151 | %endmacro
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152 |
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153 | %macro eCMOVZ 2
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154 | jnz SHORT %%Return
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155 | mov %1, %2
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156 | %%Return:
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157 | %endmacro
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158 |
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159 | %macro eCMOVNZ 2
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160 | jz SHORT %%Return
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161 | mov %1, %2
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162 | %%Return:
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163 | %endmacro
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164 |
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165 | %macro eCMOVE 2
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166 | eCMOVZ %1, %2
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167 | %endmacro
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168 |
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169 | %macro eCMOVNE 2
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170 | eCMOVNZ %1, %2
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171 | %endmacro
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172 |
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173 | %macro eCMOVB 2
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174 | jnb SHORT %%Return
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175 | mov %1, %2
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176 | %%Return:
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177 | %endmacro
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178 |
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179 |
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180 |
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181 | ;--------------------------------------------------------------------
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182 | ; Moves byte with zero-extending to any Register.
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183 | ;
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184 | ; eMOVZX
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185 | ; Parameters:
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186 | ; %1: Destination Register (SP not supported)
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187 | ; %2: Byte register or byte address
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188 | ; Returns:
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189 | ; Nothing
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190 | ; Corrupts registers:
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191 | ; FLAGS
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192 | ;--------------------------------------------------------------------
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193 | %macro eMOVZX 2
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194 | %ifndef USE_386
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195 | %ifidni %1, ax
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196 | mov al, %2
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197 | xor ah, ah
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198 | %elifidni %1, bx
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199 | mov bl, %2
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200 | xor bh, bh ; %2 may use BX in effective address
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201 | %elifidni %1, cx
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202 | mov cl, %2
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203 | xor ch, ch
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204 | %elifidni %1, dx
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205 | mov dl, %2
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206 | xor dh, dh
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207 | %else ; SI, DI, BP (all may be used in effective address)
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208 | push ax
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209 | mov al, %2
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210 | xor ah, ah
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211 | xchg ax, %1
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212 | pop ax
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213 | %endif
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214 | ;-----------------------------------
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215 | %else
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216 | movzx %1, %2
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217 | %endif
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218 | %endmacro
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219 |
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220 |
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221 | ;--------------------------------------------------------------------
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222 | ; Emulates PUSHA instruction when necessary.
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223 | ;
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224 | ; ePUSHA
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225 | ; Parameters:
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226 | ; Nothing
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227 | ; Returns:
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228 | ; Nothing
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229 | ; Corrupts registers:
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230 | ; Nothing
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231 | ;--------------------------------------------------------------------
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232 | %macro ePUSHA 0
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233 | %ifndef USE_186
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234 | push ax
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235 | push cx
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236 | push dx
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237 | push bx
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238 | push bx ; SP before first push should be pushed here
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239 | push bp
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240 | push si
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241 | push di
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242 | ;-----------------------------------
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243 | %else
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244 | pusha
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245 | %endif
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246 | %endmacro
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247 |
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248 |
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249 | ;--------------------------------------------------------------------
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250 | ; Emulates POPA instruction when necessary.
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251 | ;
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252 | ; ePOPA
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253 | ; Parameters:
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254 | ; Nothing
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255 | ; Returns:
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256 | ; Nothing
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257 | ; Corrupts registers:
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258 | ; Nothing
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259 | ;--------------------------------------------------------------------
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260 | %macro ePOPA 0
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261 | %ifndef USE_186
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262 | pop di
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263 | pop si
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264 | pop bp
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265 | pop di ; Skip SP
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266 | pop bx
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267 | pop dx
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268 | pop cx
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269 | pop ax
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270 | ;-----------------------------------
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271 | %else
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272 | popa
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273 | %endif
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274 | %endmacro
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275 |
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276 |
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277 | ;--------------------------------------------------------------------
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278 | ; Emulates ENTER instruction when necessary.
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279 | ;
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280 | ; eENTER
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281 | ; Parameters:
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282 | ; %1: Number of bytes to reserve from stack
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283 | ; %2: The lexical nesting level (not emulated, set to 0)
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284 | ; Returns:
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285 | ; SS:BP: Ptr to old BP
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286 | ; ([bp-2] points to highest local stack frame word)
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287 | ; Corrupts registers:
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288 | ; FLAGS
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289 | ;--------------------------------------------------------------------
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290 | %macro eENTER 2
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291 | %ifndef USE_186
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292 | push bp
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293 | mov bp, sp
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294 | sub sp, %1
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295 | ;-----------------------------------
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296 | %else
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297 | enter %1, %2
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298 | %endif
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299 | %endmacro
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300 |
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301 | ;--------------------------------------------------------------------
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302 | ; Emulates LEAVE instruction when necessary.
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303 | ;
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304 | ; eLEAVE
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305 | ; Parameters:
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306 | ; Nothing
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307 | ; Returns:
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308 | ; BP: What it was before eENTER
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309 | ; Corrupts registers:
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310 | ; Nothing
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311 | ;--------------------------------------------------------------------
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312 | %macro eLEAVE 0
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313 | %ifndef USE_186
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314 | mov sp, bp
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315 | pop bp
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316 | ;-----------------------------------
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317 | %else
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318 | leave
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319 | %endif
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320 | %endmacro
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321 |
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322 |
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323 | ;--------------------------------------------------------------------
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324 | ; Emulates LSS instruction when necessary.
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325 | ;
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326 | ; eLSS
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327 | ; Parameters:
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328 | ; %1: Destination register
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329 | ; %2: Source memory address without brackets
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330 | ; Returns:
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331 | ; IF: 0 (interrupts disabled)
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332 | ; Corrupts registers:
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333 | ; Nothing
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334 | ;--------------------------------------------------------------------
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335 | %macro eLSS 2
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336 | %ifndef USE_386
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337 | cli ; Disable interrupts
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338 | mov %1, [%2] ; Load offset
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339 | mov ss, [%2+2] ; Load segment
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340 | ;-----------------------------------
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341 | %else
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342 | lss %1, [%2]
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343 | %endif
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344 | %endmacro
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345 |
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346 |
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347 | ;--------------------------------------------------------------------
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348 | ; Segment override prefix instruction.
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349 | ;
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350 | ; eSEG
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351 | ; Parameters:
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352 | ; %1: Name of the segment (ES, CS, SS, DS, FS or GS)
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353 | ; Returns:
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354 | ; Nothing
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355 | ; Corrupts registers:
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356 | ; Nothing
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357 | ;--------------------------------------------------------------------
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358 | %macro eSEG 1
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359 | %ifidni %1, es
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360 | db 00100110b
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361 | %elifidni %1, cs
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362 | db 00101110b
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363 | %elifidni %1, ss
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364 | db 00110110b
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365 | %elifidni %1, ds
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366 | db 00111110b
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367 | %elifidni %1, fs
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368 | db 01100100b
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369 | %elifidni %1, gs
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370 | db 01100101b
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371 | %else
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372 | %error "Invalid segment overried passed to eSEG!"
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373 | %endif
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374 | %endmacro
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375 |
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376 |
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377 | ;--------------------------------------------------------------------
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378 | ; Repeats string instruction with segment override.
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379 | ; This macro prevents 8088/8086 restart bug.
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380 | ;
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381 | ; eSEG_STR
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382 | ; Parameters:
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383 | ; %1: REP/REPNE or REPE prefix
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384 | ; %2: Source segment override (destination is always ES)
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385 | ; %3: String instruction
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386 | ; CX: Repeat count
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387 | ; Returns:
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388 | ; FLAGS for cmps and scas only
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389 | ; Corrupts registers:
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390 | ; Nothing
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391 | ;--------------------------------------------------------------------
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392 | %macro eSEG_STR 3
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393 | %ifndef USE_186 ; 8088/8086 has string instruction restart bug when more than one prefix
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394 | %%Loop:
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395 | %1 ; REP is the prefix that can be lost
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396 | eSEG %2 ; SEG is the prefix that won't be lost
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397 | %3 ; String instruction
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398 | jcxz %%End ; Jump to end if no repeats left (preserves FLAGS)
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399 | jmp SHORT %%Loop ; Loop while repeats left
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400 | %%End:
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401 | %else ; No bug on V20/V30 and later, don't know about 188/186
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402 | eSEG %2
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403 | %1 %3
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404 | %endif
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405 | %endmacro
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406 |
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407 |
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408 | ;--------------------------------------------------------------------
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409 | ; Bit shifts and rotates with immediate.
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410 | ;
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411 | ; eSHIFT_IM
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412 | ; Parameters:
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413 | ; %1: Shift target
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414 | ; %2: Number of bits to shift
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415 | ; %3: Instruction (SHL, SHR, ROL, ROR, RCL, RCR)
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416 | ; Returns:
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417 | ; FLAGS
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418 | ; Corrupts registers:
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419 | ; Nothing
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420 | ;--------------------------------------------------------------------
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421 | %macro eSHIFT_IM 3
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422 | %ifndef USE_186
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423 | %ifidni %1, cl
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424 | times %2 %3 %1, 1
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425 | %elifidni %1, ch
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426 | times %2 %3 %1, 1
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427 | %elifidni %1, cx
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428 | times %2 %3 %1, 1
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429 | %else
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430 | %if %2 > 7
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431 | push cx
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432 | mov cl, %2
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433 | %3 %1, cl
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434 | pop cx
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435 | %else
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436 | times %2 %3 %1, 1
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437 | %endif
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438 | %endif
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439 | ;-----------------------------------
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440 | %else
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441 | %3 %1, %2
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442 | %endif
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443 | %endmacro
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444 | %macro eSHR_IM 2
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445 | eSHIFT_IM %1, %2, shr
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446 | %endmacro
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447 | %macro eSHL_IM 2
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448 | eSHIFT_IM %1, %2, shl
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449 | %endmacro
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450 | %macro eROR_IM 2
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451 | eSHIFT_IM %1, %2, ror
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452 | %endmacro
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453 | %macro eROL_IM 2
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454 | eSHIFT_IM %1, %2, rol
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455 | %endmacro
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456 | %macro eRCR_IM 2
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457 | eSHIFT_IM %1, %2, rcr
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458 | %endmacro
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459 | %macro eRCL_IM 2
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460 | eSHIFT_IM %1, %2, rcl
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461 | %endmacro
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462 |
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463 |
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464 | ;--------------------------------------------------------------------
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465 | ; Emulates PUSH imm instruction when necessary.
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466 | ;
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467 | ; ePUSH_I
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468 | ; Parameters:
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469 | ; %1: Immediate to push
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470 | ; Returns:
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471 | ; Nothing
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472 | ; Corrupts registers:
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473 | ; Nothing
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474 | ;--------------------------------------------------------------------
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475 | %macro ePUSH_I 1
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476 | %ifndef USE_186
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477 | push bp ; Immediate goes here
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478 | push bp
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479 | mov bp, sp
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480 | mov WORD [bp+2], %1
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481 | pop bp
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482 | ;-----------------------------------
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483 | %else
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484 | push %1
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485 | %endif
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486 | %endmacro
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487 |
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488 |
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489 | ;--------------------------------------------------------------------
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490 | ; Emulates PUSH imm instruction when necessary.
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491 | ; ePUSH_T uses temporary register for faster performance
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492 | ; and smaller code size than ePUSH_I.
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493 | ;
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494 | ; ePUSH_T
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495 | ; Parameters:
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496 | ; %1: Temporary Register
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497 | ; %2: Immediate to push
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498 | ; Returns:
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499 | ; Nothing
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500 | ; Corrupts registers:
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501 | ; %1
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502 | ;--------------------------------------------------------------------
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503 | %macro ePUSH_T 2
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504 | %ifndef USE_186
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505 | %ifidni %2, 0
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506 | xor %1, %1
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507 | %else
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508 | mov %1, %2
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509 | %endif
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510 | push %1
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511 | ;-----------------------------------
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512 | %else
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513 | push %2
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514 | %endif
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515 | %endmacro
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516 |
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517 |
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518 | %endif ; EMULATE_INC
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