[41] | 1 | ; Project name : Emulation library
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[293] | 2 | ; Description : Macros for emulating later x86 instructions with older
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[41] | 3 | ; processors.
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[293] | 4 | ; Macros are used so optimized builds can be done
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[41] | 5 | ; easily for different processors.
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| 6 | ;
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| 7 | ; This file must be first to be included to
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| 8 | ; any source file.
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| 9 | %ifndef EMULATE_INC
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| 10 | %define EMULATE_INC
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| 11 |
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[293] | 12 | ; Defines for processor support (should be set in makefile).
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| 13 | ; Unsupported instructions will be emulated using macros.
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[41] | 14 | ; If AT class PC is used (instead of XT), define USE_AT
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[293] | 15 |
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[41] | 16 | ;%define USE_186 ; Define to use 18x/V20/V30 instructions
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| 17 | ;%define USE_286 ; Define to use 286 instructions
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| 18 | ;%define USE_386 ; Define to use 386 instructions
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| 19 | ;%define USE_AT ; Define for AT class machine
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| 20 |
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[293] | 21 | %ifdef USE_386
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| 22 | %define USE_286 ; Define to use 286 instructions
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| 23 | %endif
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| 24 | %ifdef USE_286
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| 25 | %define USE_186 ; Define to use 18x/V20/V30 instructions
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| 26 | %endif
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| 27 |
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| 28 | %ifdef USE_386
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| 29 | CPU 386 ; Allow instructions up to 386
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[41] | 30 | %elifdef USE_286
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[293] | 31 | CPU 286 ; Allow instructions up to 286
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| 32 | %elifdef USE_186
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| 33 | CPU 186 ; Allow instructions up to 188/186/V20/V30
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| 34 | %else
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| 35 | CPU 8086 ; Allow 8088/8086 instructions only
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[41] | 36 | %endif
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[293] | 37 |
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[41] | 38 | BITS 16 ; Set 16 bit code generation
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| 39 |
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| 40 | ; Alignments for jump targets.
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| 41 | ; Following values are optimal for different processor types:
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| 42 | ; 286 and 386SX WORD (16-bit, 2 bytes)
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| 43 | ; 386DX and 486 DWORD (32-bit, 4 bytes)
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| 44 | ; Pentium and later QWORD (64-bit, 8 bytes)
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| 45 | %ifdef USE_AT
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| 46 | %ifdef USE_386
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| 47 | JUMP_ALIGN EQU 4
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| 48 | WORD_ALIGN EQU 2
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| 49 | %else ; USE_286
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| 50 | JUMP_ALIGN EQU 2
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| 51 | WORD_ALIGN EQU 2
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| 52 | %endif
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| 53 | %else ; XT
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| 54 | JUMP_ALIGN EQU 1
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| 55 | WORD_ALIGN EQU 1
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| 56 | %endif
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| 57 |
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| 58 | ;==========================================================================
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| 59 |
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| 60 | ;--------------------------------------------------------------------
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| 61 | ; Emulates BSF (Bit Scan Forward) instruction when necessary.
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| 62 | ; BSF is used to find index of least significant bit.
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| 63 | ;
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| 64 | ; eBSF
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| 65 | ; Parameters:
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| 66 | ; %1: Destination WORD Register for bit index (not CX or same as %2!)
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| 67 | ; %2: Source WORD operand where to search bit (not CX or same as %1!)
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| 68 | ; Returns:
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| 69 | ; %1: Index of highest order bit from %2
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| 70 | ; ZF: Set if %2 is zero
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| 71 | ; Cleared if %2 is non-zero
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| 72 | ; Corrupts registers:
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| 73 | ; Nothing
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| 74 | ;--------------------------------------------------------------------
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| 75 | %macro eBSF 2
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| 76 | %ifndef USE_386
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| 77 | push cx
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| 78 | cmp WORD %2, BYTE 0 ; Source operand is zero?
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| 79 | je SHORT %%Return ; If so, return with ZF set
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| 80 |
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| 81 | ; Set destination to zero and load mask for bit 0
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| 82 | xor %1, %1
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| 83 | mov cx, 1
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| 84 |
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| 85 | ALIGN JUMP_ALIGN
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| 86 | %%BitLoop:
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| 87 | test %2, cx ; Bit set?
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| 88 | jnz SHORT %%Return ; If so, return with ZF cleared
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| 89 | shl cx, 1 ; Prepare to test next bit
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| 90 | inc %1 ; Increment bit index
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| 91 | jmp SHORT %%BitLoop ; Loop until bit found
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| 92 | %%Return:
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| 93 | pop cx
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| 94 | ;-----------------------------------
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| 95 | %else
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| 96 | bsf %1, %2
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| 97 | %endif
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| 98 | %endmacro
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| 99 |
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| 100 |
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| 101 | ;--------------------------------------------------------------------
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| 102 | ; Emulates BSR (Bit Scan Reverse) instruction when necessary.
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| 103 | ; BSR is used to find index of most significant bit.
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| 104 | ;
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| 105 | ; eBSR
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| 106 | ; Parameters:
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| 107 | ; %1: Destination WORD Register for bit index (not CX or same as %2!)
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| 108 | ; %2: Source WORD operand where to search bit (not CX or same as %1!)
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| 109 | ; Returns:
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| 110 | ; %1: Index of highest order bit from %2
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| 111 | ; ZF: Set if %2 is zero
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| 112 | ; Cleared if %2 is non-zero
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| 113 | ; Corrupts registers:
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| 114 | ; Nothing
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| 115 | ;--------------------------------------------------------------------
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| 116 | %macro eBSR 2
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| 117 | %ifndef USE_386
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| 118 | push cx
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| 119 | cmp WORD %2, BYTE 0 ; Source operand is zero?
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| 120 | je SHORT %%Return ; If so, return with ZF set
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| 121 |
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| 122 | ; Load mask for highest order bit
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| 123 | mov cx, 1<<15
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| 124 | mov %1, 15
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| 125 |
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| 126 | ALIGN JUMP_ALIGN
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| 127 | %%BitLoop:
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| 128 | test %2, cx ; Bit set?
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| 129 | jnz SHORT %%Return ; If so, return with ZF cleared
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| 130 | shr cx, 1 ; Prepare to test next bit
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| 131 | dec %1 ; Decrement bit index
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| 132 | jmp SHORT %%BitLoop ; Loop until bit found
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| 133 | %%Return:
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| 134 | pop cx
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| 135 | ;-----------------------------------
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| 136 | %else
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| 137 | bsr %1, %2
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| 138 | %endif
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| 139 | %endmacro
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| 140 |
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| 141 |
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| 142 | ;--------------------------------------------------------------------
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| 143 | ; Conditional Move.
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| 144 | ;
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| 145 | ; eCMOVcc
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| 146 | ; Parameters:
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| 147 | ; %1: Destination data
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| 148 | ; %2: Source data
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| 149 | ; Returns:
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| 150 | ; Nothing
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| 151 | ; Corrupts registers:
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| 152 | ; Nothing
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| 153 | ;--------------------------------------------------------------------
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[146] | 154 | %macro eCMOVA 2
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| 155 | jbe SHORT %%Return
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| 156 | mov %1, %2
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| 157 | %%Return:
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| 158 | %endmacro
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| 159 |
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[41] | 160 | %macro eCMOVC 2
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| 161 | jnc SHORT %%Return
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| 162 | mov %1, %2
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| 163 | %%Return:
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| 164 | %endmacro
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| 165 |
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[390] | 166 | %macro eCMOVNC 2
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| 167 | jc SHORT %%Return
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| 168 | mov %1, %2
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| 169 | %%Return:
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| 170 | %endmacro
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| 171 |
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[64] | 172 | %macro eCMOVZ 2
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| 173 | jnz SHORT %%Return
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| 174 | mov %1, %2
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| 175 | %%Return:
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| 176 | %endmacro
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| 177 |
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[94] | 178 | %macro eCMOVNZ 2
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| 179 | jz SHORT %%Return
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[41] | 180 | mov %1, %2
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| 181 | %%Return:
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| 182 | %endmacro
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| 183 |
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[94] | 184 | %macro eCMOVE 2
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| 185 | eCMOVZ %1, %2
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| 186 | %endmacro
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| 187 |
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| 188 | %macro eCMOVNE 2
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| 189 | eCMOVNZ %1, %2
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| 190 | %endmacro
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| 191 |
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[60] | 192 | %macro eCMOVB 2
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| 193 | jnb SHORT %%Return
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| 194 | mov %1, %2
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| 195 | %%Return:
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| 196 | %endmacro
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[41] | 197 |
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[390] | 198 | %macro eCMOVS 2
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| 199 | jns SHORT %%Return
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| 200 | mov %1, %2
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| 201 | %%Return:
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| 202 | %endmacro
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[41] | 203 |
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[396] | 204 | %macro eCMOVNS 2
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| 205 | js SHORT %%Return
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| 206 | mov %1, %2
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| 207 | %%Return:
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| 208 | %endmacro
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[390] | 209 |
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[396] | 210 |
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[168] | 211 | ;--------------------------------------------------------------------
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| 212 | ; Conditional Set.
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| 213 | ;
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| 214 | ; eCSETcc
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| 215 | ; Parameters:
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| 216 | ; %1: Destination data
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| 217 | ; Returns:
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| 218 | ; Nothing
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| 219 | ; Corrupts registers:
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| 220 | ; Flags
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| 221 | ;--------------------------------------------------------------------
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| 222 | %macro eCSETZ 1
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| 223 | mov %1, 0 ; Clear while preserving flags
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| 224 | jnz SHORT %%Return ; Nothing to set
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| 225 | inc %1
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| 226 | %%Return:
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| 227 | %endmacro
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[60] | 228 |
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[168] | 229 |
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[41] | 230 | ;--------------------------------------------------------------------
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| 231 | ; Moves byte with zero-extending to any Register.
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| 232 | ;
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| 233 | ; eMOVZX
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| 234 | ; Parameters:
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| 235 | ; %1: Destination Register (SP not supported)
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| 236 | ; %2: Byte register or byte address
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| 237 | ; Returns:
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| 238 | ; Nothing
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| 239 | ; Corrupts registers:
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| 240 | ; FLAGS
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| 241 | ;--------------------------------------------------------------------
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| 242 | %macro eMOVZX 2
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| 243 | %ifndef USE_386
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| 244 | %ifidni %1, ax
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| 245 | mov al, %2
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| 246 | xor ah, ah
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| 247 | %elifidni %1, bx
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| 248 | mov bl, %2
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| 249 | xor bh, bh ; %2 may use BX in effective address
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| 250 | %elifidni %1, cx
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| 251 | mov cl, %2
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| 252 | xor ch, ch
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| 253 | %elifidni %1, dx
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| 254 | mov dl, %2
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| 255 | xor dh, dh
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| 256 | %else ; SI, DI, BP (all may be used in effective address)
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| 257 | push ax
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| 258 | mov al, %2
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| 259 | xor ah, ah
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| 260 | xchg ax, %1
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| 261 | pop ax
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| 262 | %endif
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| 263 | ;-----------------------------------
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| 264 | %else
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| 265 | movzx %1, %2
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| 266 | %endif
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| 267 | %endmacro
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| 268 |
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| 269 |
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| 270 | ;--------------------------------------------------------------------
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| 271 | ; Emulates PUSHA instruction when necessary.
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| 272 | ;
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| 273 | ; ePUSHA
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| 274 | ; Parameters:
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| 275 | ; Nothing
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| 276 | ; Returns:
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| 277 | ; Nothing
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| 278 | ; Corrupts registers:
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| 279 | ; Nothing
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| 280 | ;--------------------------------------------------------------------
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| 281 | %macro ePUSHA 0
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| 282 | %ifndef USE_186
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| 283 | push ax
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| 284 | push cx
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| 285 | push dx
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| 286 | push bx
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[113] | 287 | push sp
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[41] | 288 | push bp
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| 289 | push si
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| 290 | push di
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| 291 | ;-----------------------------------
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| 292 | %else
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| 293 | pusha
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| 294 | %endif
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| 295 | %endmacro
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| 296 |
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| 297 |
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| 298 | ;--------------------------------------------------------------------
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| 299 | ; Emulates POPA instruction when necessary.
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| 300 | ;
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| 301 | ; ePOPA
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| 302 | ; Parameters:
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| 303 | ; Nothing
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| 304 | ; Returns:
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| 305 | ; Nothing
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| 306 | ; Corrupts registers:
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| 307 | ; Nothing
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| 308 | ;--------------------------------------------------------------------
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| 309 | %macro ePOPA 0
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| 310 | %ifndef USE_186
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| 311 | pop di
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| 312 | pop si
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| 313 | pop bp
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[113] | 314 | pop ax ; Skip SP
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[41] | 315 | pop bx
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| 316 | pop dx
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| 317 | pop cx
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| 318 | pop ax
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| 319 | ;-----------------------------------
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| 320 | %else
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| 321 | popa
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| 322 | %endif
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| 323 | %endmacro
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| 324 |
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| 325 |
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| 326 | ;--------------------------------------------------------------------
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| 327 | ; Emulates ENTER instruction when necessary.
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| 328 | ;
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| 329 | ; eENTER
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| 330 | ; Parameters:
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| 331 | ; %1: Number of bytes to reserve from stack
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| 332 | ; %2: The lexical nesting level (not emulated, set to 0)
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| 333 | ; Returns:
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| 334 | ; SS:BP: Ptr to old BP
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| 335 | ; ([bp-2] points to highest local stack frame word)
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| 336 | ; Corrupts registers:
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| 337 | ; FLAGS
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| 338 | ;--------------------------------------------------------------------
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| 339 | %macro eENTER 2
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| 340 | %ifndef USE_186
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| 341 | push bp
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| 342 | mov bp, sp
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| 343 | sub sp, %1
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| 344 | ;-----------------------------------
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| 345 | %else
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| 346 | enter %1, %2
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| 347 | %endif
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| 348 | %endmacro
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| 349 |
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| 350 | ;--------------------------------------------------------------------
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| 351 | ; Emulates LEAVE instruction when necessary.
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| 352 | ;
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| 353 | ; eLEAVE
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| 354 | ; Parameters:
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| 355 | ; Nothing
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| 356 | ; Returns:
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| 357 | ; BP: What it was before eENTER
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| 358 | ; Corrupts registers:
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| 359 | ; Nothing
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| 360 | ;--------------------------------------------------------------------
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| 361 | %macro eLEAVE 0
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| 362 | %ifndef USE_186
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| 363 | mov sp, bp
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| 364 | pop bp
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| 365 | ;-----------------------------------
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| 366 | %else
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| 367 | leave
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| 368 | %endif
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| 369 | %endmacro
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| 370 |
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| 371 |
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| 372 | ;--------------------------------------------------------------------
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| 373 | ; Emulates LSS instruction when necessary.
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| 374 | ;
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| 375 | ; eLSS
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| 376 | ; Parameters:
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| 377 | ; %1: Destination register
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| 378 | ; %2: Source memory address without brackets
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| 379 | ; Returns:
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| 380 | ; IF: 0 (interrupts disabled)
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| 381 | ; Corrupts registers:
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| 382 | ; Nothing
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| 383 | ;--------------------------------------------------------------------
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| 384 | %macro eLSS 2
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| 385 | %ifndef USE_386
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| 386 | cli ; Disable interrupts
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| 387 | mov %1, [%2] ; Load offset
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| 388 | mov ss, [%2+2] ; Load segment
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| 389 | ;-----------------------------------
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| 390 | %else
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| 391 | lss %1, [%2]
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| 392 | %endif
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| 393 | %endmacro
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| 394 |
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| 395 |
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| 396 | ;--------------------------------------------------------------------
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| 397 | ; Repeats string instruction with segment override.
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| 398 | ; This macro prevents 8088/8086 restart bug.
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| 399 | ;
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| 400 | ; eSEG_STR
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| 401 | ; Parameters:
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| 402 | ; %1: REP/REPNE or REPE prefix
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| 403 | ; %2: Source segment override (destination is always ES)
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| 404 | ; %3: String instruction
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| 405 | ; CX: Repeat count
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| 406 | ; Returns:
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| 407 | ; FLAGS for cmps and scas only
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| 408 | ; Corrupts registers:
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| 409 | ; Nothing
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| 410 | ;--------------------------------------------------------------------
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| 411 | %macro eSEG_STR 3
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| 412 | %ifndef USE_186 ; 8088/8086 has string instruction restart bug when more than one prefix
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[223] | 413 | %%Loop:
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| 414 | %1 ; REP is the prefix that can be lost
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| 415 | %2 ; SEG is the prefix that won't be lost
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| 416 | %3 ; String instruction
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| 417 | jcxz %%End ; Jump to end if no repeats left (preserves FLAGS)
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| 418 | jmp SHORT %%Loop ; Loop while repeats left
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| 419 | %%End:
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[41] | 420 | %else ; No bug on V20/V30 and later, don't know about 188/186
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[223] | 421 | %2
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| 422 | %1 %3
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[41] | 423 | %endif
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| 424 | %endmacro
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| 425 |
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| 426 |
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| 427 | ;--------------------------------------------------------------------
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| 428 | ; Bit shifts and rotates with immediate.
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| 429 | ;
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| 430 | ; eSHIFT_IM
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| 431 | ; Parameters:
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| 432 | ; %1: Shift target
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| 433 | ; %2: Number of bits to shift
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| 434 | ; %3: Instruction (SHL, SHR, ROL, ROR, RCL, RCR)
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| 435 | ; Returns:
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| 436 | ; FLAGS
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| 437 | ; Corrupts registers:
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| 438 | ; Nothing
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| 439 | ;--------------------------------------------------------------------
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| 440 | %macro eSHIFT_IM 3
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[488] | 441 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
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[41] | 442 | %ifndef USE_186
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| 443 | %ifidni %1, cl
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| 444 | times %2 %3 %1, 1
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| 445 | %elifidni %1, ch
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| 446 | times %2 %3 %1, 1
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| 447 | %elifidni %1, cx
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| 448 | times %2 %3 %1, 1
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| 449 | %else
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[181] | 450 | %if %2 > 3 ; Size optimized value
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[41] | 451 | push cx
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| 452 | mov cl, %2
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| 453 | %3 %1, cl
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| 454 | pop cx
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| 455 | %else
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| 456 | times %2 %3 %1, 1
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| 457 | %endif
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| 458 | %endif
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| 459 | ;-----------------------------------
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| 460 | %else
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| 461 | %3 %1, %2
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| 462 | %endif
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[488] | 463 | %endif
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[41] | 464 | %endmacro
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[420] | 465 |
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[41] | 466 | %macro eSHR_IM 2
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| 467 | eSHIFT_IM %1, %2, shr
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| 468 | %endmacro
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[445] | 469 |
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[41] | 470 | %macro eSHL_IM 2
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[489] | 471 | %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
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[445] | 472 | %ifdef USE_386
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| 473 | %if %2 = 1
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| 474 | add %1, %1 ; Same size but faster on 386 and 486. Fails if %1 is a memory operand.
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| 475 | %else
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| 476 | eSHIFT_IM %1, %2, shl
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| 477 | %endif
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| 478 | %else
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[41] | 479 | eSHIFT_IM %1, %2, shl
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[445] | 480 | %endif
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[489] | 481 | %endif
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[41] | 482 | %endmacro
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[445] | 483 |
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[41] | 484 | %macro eROR_IM 2
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| 485 | eSHIFT_IM %1, %2, ror
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| 486 | %endmacro
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[445] | 487 |
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[41] | 488 | %macro eROL_IM 2
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| 489 | eSHIFT_IM %1, %2, rol
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| 490 | %endmacro
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[445] | 491 |
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[41] | 492 | %macro eRCR_IM 2
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| 493 | eSHIFT_IM %1, %2, rcr
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| 494 | %endmacro
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[445] | 495 |
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[41] | 496 | %macro eRCL_IM 2
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| 497 | eSHIFT_IM %1, %2, rcl
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| 498 | %endmacro
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| 499 |
|
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| 500 |
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| 501 | ;--------------------------------------------------------------------
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| 502 | ; Emulates PUSH imm instruction when necessary.
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| 503 | ;
|
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| 504 | ; ePUSH_I
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| 505 | ; Parameters:
|
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| 506 | ; %1: Immediate to push
|
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| 507 | ; Returns:
|
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| 508 | ; Nothing
|
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| 509 | ; Corrupts registers:
|
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| 510 | ; Nothing
|
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| 511 | ;--------------------------------------------------------------------
|
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| 512 | %macro ePUSH_I 1
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| 513 | %ifndef USE_186
|
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| 514 | push bp ; Immediate goes here
|
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| 515 | push bp
|
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| 516 | mov bp, sp
|
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| 517 | mov WORD [bp+2], %1
|
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| 518 | pop bp
|
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| 519 | ;-----------------------------------
|
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| 520 | %else
|
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| 521 | push %1
|
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| 522 | %endif
|
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| 523 | %endmacro
|
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| 524 |
|
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| 525 |
|
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| 526 | ;--------------------------------------------------------------------
|
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| 527 | ; Emulates PUSH imm instruction when necessary.
|
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| 528 | ; ePUSH_T uses temporary register for faster performance
|
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| 529 | ; and smaller code size than ePUSH_I.
|
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| 530 | ;
|
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| 531 | ; ePUSH_T
|
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| 532 | ; Parameters:
|
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| 533 | ; %1: Temporary Register
|
---|
| 534 | ; %2: Immediate to push
|
---|
| 535 | ; Returns:
|
---|
| 536 | ; Nothing
|
---|
| 537 | ; Corrupts registers:
|
---|
| 538 | ; %1
|
---|
| 539 | ;--------------------------------------------------------------------
|
---|
| 540 | %macro ePUSH_T 2
|
---|
| 541 | %ifndef USE_186
|
---|
| 542 | %ifidni %2, 0
|
---|
| 543 | xor %1, %1
|
---|
| 544 | %else
|
---|
| 545 | mov %1, %2
|
---|
| 546 | %endif
|
---|
| 547 | push %1
|
---|
| 548 | ;-----------------------------------
|
---|
| 549 | %else
|
---|
| 550 | push %2
|
---|
| 551 | %endif
|
---|
| 552 | %endmacro
|
---|
| 553 |
|
---|
| 554 |
|
---|
| 555 | %endif ; EMULATE_INC
|
---|