[41] | 1 | ; Project name : Emulation library
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| 2 | ; Description : Macros for emulating later x86 instruction with older
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| 3 | ; processors.
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| 4 | ; Macros are used so optimized builds could be done
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| 5 | ; easily for different processors.
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| 6 | ;
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| 7 | ; This file must be first to be included to
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| 8 | ; any source file.
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| 9 | %ifndef EMULATE_INC
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| 10 | %define EMULATE_INC
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| 11 |
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| 12 | ; Defines for processor support. Unsupported instructions will be
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| 13 | ; emulated using macros.
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| 14 | ; If using 286, define USE_186 and USE_286
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| 15 | ; If using 386, define USE_186, USE_286 and USE_386
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| 16 | ; If AT class PC is used (instead of XT), define USE_AT
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| 17 | ;%define USE_186 ; Define to use 18x/V20/V30 instructions
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| 18 | ;%define USE_286 ; Define to use 286 instructions
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| 19 | ;%define USE_386 ; Define to use 386 instructions
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| 20 | ;%define USE_AT ; Define for AT class machine
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| 21 | ; Above defines should be set on makefile!
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| 22 |
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| 23 | CPU 8086 ; Allow 8088/8086 instructions only
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| 24 | %ifdef USE_186
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| 25 | CPU 186 ; Allow instructions up to 188/186/V20/V30
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| 26 | %elifdef USE_286
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| 27 | CPU 286 ; Allow instructions up to 286
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| 28 | %elifdef USE_386
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| 29 | CPU 386 ; Allow instructions up to 386
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| 30 | %endif
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| 31 | BITS 16 ; Set 16 bit code generation
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| 32 |
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| 33 | ; Alignments for jump targets.
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| 34 | ; Following values are optimal for different processor types:
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| 35 | ; 286 and 386SX WORD (16-bit, 2 bytes)
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| 36 | ; 386DX and 486 DWORD (32-bit, 4 bytes)
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| 37 | ; Pentium and later QWORD (64-bit, 8 bytes)
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| 38 | %ifdef USE_AT
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| 39 | %ifdef USE_386
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| 40 | JUMP_ALIGN EQU 4
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| 41 | WORD_ALIGN EQU 2
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| 42 | %else ; USE_286
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| 43 | JUMP_ALIGN EQU 2
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| 44 | WORD_ALIGN EQU 2
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| 45 | %endif
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| 46 | %else ; XT
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| 47 | JUMP_ALIGN EQU 1
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| 48 | WORD_ALIGN EQU 1
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| 49 | %endif
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| 50 |
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| 51 | ;==========================================================================
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| 52 |
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| 53 | ;--------------------------------------------------------------------
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| 54 | ; Emulates BSF (Bit Scan Forward) instruction when necessary.
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| 55 | ; BSF is used to find index of least significant bit.
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| 56 | ;
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| 57 | ; eBSF
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| 58 | ; Parameters:
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| 59 | ; %1: Destination WORD Register for bit index (not CX or same as %2!)
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| 60 | ; %2: Source WORD operand where to search bit (not CX or same as %1!)
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| 61 | ; Returns:
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| 62 | ; %1: Index of highest order bit from %2
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| 63 | ; ZF: Set if %2 is zero
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| 64 | ; Cleared if %2 is non-zero
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| 65 | ; Corrupts registers:
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| 66 | ; Nothing
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| 67 | ;--------------------------------------------------------------------
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| 68 | %macro eBSF 2
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| 69 | %ifndef USE_386
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| 70 | push cx
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| 71 | cmp WORD %2, BYTE 0 ; Source operand is zero?
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| 72 | je SHORT %%Return ; If so, return with ZF set
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| 73 |
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| 74 | ; Set destination to zero and load mask for bit 0
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| 75 | xor %1, %1
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| 76 | mov cx, 1
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| 77 |
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| 78 | ALIGN JUMP_ALIGN
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| 79 | %%BitLoop:
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| 80 | test %2, cx ; Bit set?
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| 81 | jnz SHORT %%Return ; If so, return with ZF cleared
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| 82 | shl cx, 1 ; Prepare to test next bit
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| 83 | inc %1 ; Increment bit index
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| 84 | jmp SHORT %%BitLoop ; Loop until bit found
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| 85 | %%Return:
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| 86 | pop cx
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| 87 | ;-----------------------------------
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| 88 | %else
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| 89 | bsf %1, %2
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| 90 | %endif
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| 91 | %endmacro
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| 92 |
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| 93 |
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| 94 | ;--------------------------------------------------------------------
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| 95 | ; Emulates BSR (Bit Scan Reverse) instruction when necessary.
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| 96 | ; BSR is used to find index of most significant bit.
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| 97 | ;
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| 98 | ; eBSR
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| 99 | ; Parameters:
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| 100 | ; %1: Destination WORD Register for bit index (not CX or same as %2!)
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| 101 | ; %2: Source WORD operand where to search bit (not CX or same as %1!)
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| 102 | ; Returns:
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| 103 | ; %1: Index of highest order bit from %2
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| 104 | ; ZF: Set if %2 is zero
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| 105 | ; Cleared if %2 is non-zero
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| 106 | ; Corrupts registers:
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| 107 | ; Nothing
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| 108 | ;--------------------------------------------------------------------
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| 109 | %macro eBSR 2
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| 110 | %ifndef USE_386
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| 111 | push cx
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| 112 | cmp WORD %2, BYTE 0 ; Source operand is zero?
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| 113 | je SHORT %%Return ; If so, return with ZF set
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| 114 |
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| 115 | ; Load mask for highest order bit
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| 116 | mov cx, 1<<15
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| 117 | mov %1, 15
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| 118 |
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| 119 | ALIGN JUMP_ALIGN
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| 120 | %%BitLoop:
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| 121 | test %2, cx ; Bit set?
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| 122 | jnz SHORT %%Return ; If so, return with ZF cleared
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| 123 | shr cx, 1 ; Prepare to test next bit
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| 124 | dec %1 ; Decrement bit index
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| 125 | jmp SHORT %%BitLoop ; Loop until bit found
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| 126 | %%Return:
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| 127 | pop cx
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| 128 | ;-----------------------------------
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| 129 | %else
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| 130 | bsr %1, %2
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| 131 | %endif
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| 132 | %endmacro
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| 133 |
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| 134 |
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| 135 | ;--------------------------------------------------------------------
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| 136 | ; Conditional Move.
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| 137 | ;
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| 138 | ; eCMOVcc
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| 139 | ; Parameters:
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| 140 | ; %1: Destination data
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| 141 | ; %2: Source data
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| 142 | ; Returns:
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| 143 | ; Nothing
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| 144 | ; Corrupts registers:
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| 145 | ; Nothing
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| 146 | ;--------------------------------------------------------------------
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[146] | 147 | %macro eCMOVA 2
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| 148 | jbe SHORT %%Return
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| 149 | mov %1, %2
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| 150 | %%Return:
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| 151 | %endmacro
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| 152 |
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[41] | 153 | %macro eCMOVC 2
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| 154 | jnc SHORT %%Return
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| 155 | mov %1, %2
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| 156 | %%Return:
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| 157 | %endmacro
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| 158 |
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[64] | 159 | %macro eCMOVZ 2
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| 160 | jnz SHORT %%Return
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| 161 | mov %1, %2
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| 162 | %%Return:
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| 163 | %endmacro
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| 164 |
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[94] | 165 | %macro eCMOVNZ 2
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| 166 | jz SHORT %%Return
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[41] | 167 | mov %1, %2
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| 168 | %%Return:
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| 169 | %endmacro
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| 170 |
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[94] | 171 | %macro eCMOVE 2
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| 172 | eCMOVZ %1, %2
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| 173 | %endmacro
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| 174 |
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| 175 | %macro eCMOVNE 2
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| 176 | eCMOVNZ %1, %2
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| 177 | %endmacro
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| 178 |
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[60] | 179 | %macro eCMOVB 2
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| 180 | jnb SHORT %%Return
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| 181 | mov %1, %2
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| 182 | %%Return:
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| 183 | %endmacro
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[41] | 184 |
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| 185 |
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[60] | 186 |
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[41] | 187 | ;--------------------------------------------------------------------
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| 188 | ; Moves byte with zero-extending to any Register.
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| 189 | ;
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| 190 | ; eMOVZX
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| 191 | ; Parameters:
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| 192 | ; %1: Destination Register (SP not supported)
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| 193 | ; %2: Byte register or byte address
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| 194 | ; Returns:
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| 195 | ; Nothing
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| 196 | ; Corrupts registers:
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| 197 | ; FLAGS
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| 198 | ;--------------------------------------------------------------------
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| 199 | %macro eMOVZX 2
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| 200 | %ifndef USE_386
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| 201 | %ifidni %1, ax
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| 202 | mov al, %2
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| 203 | xor ah, ah
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| 204 | %elifidni %1, bx
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| 205 | mov bl, %2
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| 206 | xor bh, bh ; %2 may use BX in effective address
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| 207 | %elifidni %1, cx
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| 208 | mov cl, %2
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| 209 | xor ch, ch
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| 210 | %elifidni %1, dx
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| 211 | mov dl, %2
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| 212 | xor dh, dh
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| 213 | %else ; SI, DI, BP (all may be used in effective address)
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| 214 | push ax
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| 215 | mov al, %2
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| 216 | xor ah, ah
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| 217 | xchg ax, %1
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| 218 | pop ax
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| 219 | %endif
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| 220 | ;-----------------------------------
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| 221 | %else
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| 222 | movzx %1, %2
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| 223 | %endif
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| 224 | %endmacro
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| 225 |
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| 226 |
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| 227 | ;--------------------------------------------------------------------
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| 228 | ; Emulates PUSHA instruction when necessary.
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| 229 | ;
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| 230 | ; ePUSHA
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| 231 | ; Parameters:
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| 232 | ; Nothing
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| 233 | ; Returns:
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| 234 | ; Nothing
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| 235 | ; Corrupts registers:
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| 236 | ; Nothing
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| 237 | ;--------------------------------------------------------------------
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| 238 | %macro ePUSHA 0
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| 239 | %ifndef USE_186
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| 240 | push ax
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| 241 | push cx
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| 242 | push dx
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| 243 | push bx
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[113] | 244 | push sp
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[41] | 245 | push bp
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| 246 | push si
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| 247 | push di
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| 248 | ;-----------------------------------
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| 249 | %else
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| 250 | pusha
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| 251 | %endif
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| 252 | %endmacro
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| 253 |
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| 254 |
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| 255 | ;--------------------------------------------------------------------
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| 256 | ; Emulates POPA instruction when necessary.
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| 257 | ;
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| 258 | ; ePOPA
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| 259 | ; Parameters:
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| 260 | ; Nothing
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| 261 | ; Returns:
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| 262 | ; Nothing
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| 263 | ; Corrupts registers:
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| 264 | ; Nothing
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| 265 | ;--------------------------------------------------------------------
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| 266 | %macro ePOPA 0
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| 267 | %ifndef USE_186
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| 268 | pop di
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| 269 | pop si
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| 270 | pop bp
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[113] | 271 | pop ax ; Skip SP
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[41] | 272 | pop bx
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| 273 | pop dx
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| 274 | pop cx
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| 275 | pop ax
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| 276 | ;-----------------------------------
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| 277 | %else
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| 278 | popa
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| 279 | %endif
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| 280 | %endmacro
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| 281 |
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| 282 |
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| 283 | ;--------------------------------------------------------------------
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| 284 | ; Emulates ENTER instruction when necessary.
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| 285 | ;
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| 286 | ; eENTER
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| 287 | ; Parameters:
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| 288 | ; %1: Number of bytes to reserve from stack
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| 289 | ; %2: The lexical nesting level (not emulated, set to 0)
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| 290 | ; Returns:
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| 291 | ; SS:BP: Ptr to old BP
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| 292 | ; ([bp-2] points to highest local stack frame word)
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| 293 | ; Corrupts registers:
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| 294 | ; FLAGS
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| 295 | ;--------------------------------------------------------------------
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| 296 | %macro eENTER 2
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| 297 | %ifndef USE_186
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| 298 | push bp
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| 299 | mov bp, sp
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| 300 | sub sp, %1
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| 301 | ;-----------------------------------
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| 302 | %else
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| 303 | enter %1, %2
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| 304 | %endif
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| 305 | %endmacro
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| 306 |
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| 307 | ;--------------------------------------------------------------------
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| 308 | ; Emulates LEAVE instruction when necessary.
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| 309 | ;
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| 310 | ; eLEAVE
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| 311 | ; Parameters:
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| 312 | ; Nothing
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| 313 | ; Returns:
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| 314 | ; BP: What it was before eENTER
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| 315 | ; Corrupts registers:
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| 316 | ; Nothing
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| 317 | ;--------------------------------------------------------------------
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| 318 | %macro eLEAVE 0
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| 319 | %ifndef USE_186
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| 320 | mov sp, bp
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| 321 | pop bp
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| 322 | ;-----------------------------------
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| 323 | %else
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| 324 | leave
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| 325 | %endif
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| 326 | %endmacro
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| 327 |
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| 328 |
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| 329 | ;--------------------------------------------------------------------
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| 330 | ; Emulates LSS instruction when necessary.
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| 331 | ;
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| 332 | ; eLSS
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| 333 | ; Parameters:
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| 334 | ; %1: Destination register
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| 335 | ; %2: Source memory address without brackets
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| 336 | ; Returns:
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| 337 | ; IF: 0 (interrupts disabled)
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| 338 | ; Corrupts registers:
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| 339 | ; Nothing
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| 340 | ;--------------------------------------------------------------------
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| 341 | %macro eLSS 2
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| 342 | %ifndef USE_386
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| 343 | cli ; Disable interrupts
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| 344 | mov %1, [%2] ; Load offset
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| 345 | mov ss, [%2+2] ; Load segment
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| 346 | ;-----------------------------------
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| 347 | %else
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| 348 | lss %1, [%2]
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| 349 | %endif
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| 350 | %endmacro
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| 351 |
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| 352 |
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| 353 | ;--------------------------------------------------------------------
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| 354 | ; Segment override prefix instruction.
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| 355 | ;
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| 356 | ; eSEG
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| 357 | ; Parameters:
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| 358 | ; %1: Name of the segment (ES, CS, SS, DS, FS or GS)
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| 359 | ; Returns:
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| 360 | ; Nothing
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| 361 | ; Corrupts registers:
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| 362 | ; Nothing
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| 363 | ;--------------------------------------------------------------------
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| 364 | %macro eSEG 1
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| 365 | %ifidni %1, es
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| 366 | db 00100110b
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| 367 | %elifidni %1, cs
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| 368 | db 00101110b
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| 369 | %elifidni %1, ss
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| 370 | db 00110110b
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| 371 | %elifidni %1, ds
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| 372 | db 00111110b
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| 373 | %elifidni %1, fs
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| 374 | db 01100100b
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| 375 | %elifidni %1, gs
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| 376 | db 01100101b
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| 377 | %else
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| 378 | %error "Invalid segment overried passed to eSEG!"
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| 379 | %endif
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| 380 | %endmacro
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| 381 |
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| 382 |
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| 383 | ;--------------------------------------------------------------------
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| 384 | ; Repeats string instruction with segment override.
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| 385 | ; This macro prevents 8088/8086 restart bug.
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| 386 | ;
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| 387 | ; eSEG_STR
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| 388 | ; Parameters:
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| 389 | ; %1: REP/REPNE or REPE prefix
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| 390 | ; %2: Source segment override (destination is always ES)
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| 391 | ; %3: String instruction
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| 392 | ; CX: Repeat count
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| 393 | ; Returns:
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| 394 | ; FLAGS for cmps and scas only
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| 395 | ; Corrupts registers:
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| 396 | ; Nothing
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| 397 | ;--------------------------------------------------------------------
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| 398 | %macro eSEG_STR 3
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| 399 | %ifndef USE_186 ; 8088/8086 has string instruction restart bug when more than one prefix
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| 400 | %%Loop:
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| 401 | %1 ; REP is the prefix that can be lost
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| 402 | eSEG %2 ; SEG is the prefix that won't be lost
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| 403 | %3 ; String instruction
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| 404 | jcxz %%End ; Jump to end if no repeats left (preserves FLAGS)
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| 405 | jmp SHORT %%Loop ; Loop while repeats left
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| 406 | %%End:
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| 407 | %else ; No bug on V20/V30 and later, don't know about 188/186
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| 408 | eSEG %2
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| 409 | %1 %3
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| 410 | %endif
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| 411 | %endmacro
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| 412 |
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| 413 |
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| 414 | ;--------------------------------------------------------------------
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| 415 | ; Bit shifts and rotates with immediate.
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| 416 | ;
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| 417 | ; eSHIFT_IM
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| 418 | ; Parameters:
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| 419 | ; %1: Shift target
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| 420 | ; %2: Number of bits to shift
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| 421 | ; %3: Instruction (SHL, SHR, ROL, ROR, RCL, RCR)
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| 422 | ; Returns:
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| 423 | ; FLAGS
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| 424 | ; Corrupts registers:
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| 425 | ; Nothing
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| 426 | ;--------------------------------------------------------------------
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| 427 | %macro eSHIFT_IM 3
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| 428 | %ifndef USE_186
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| 429 | %ifidni %1, cl
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| 430 | times %2 %3 %1, 1
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| 431 | %elifidni %1, ch
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| 432 | times %2 %3 %1, 1
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| 433 | %elifidni %1, cx
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| 434 | times %2 %3 %1, 1
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| 435 | %else
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| 436 | %if %2 > 7
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| 437 | push cx
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| 438 | mov cl, %2
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| 439 | %3 %1, cl
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| 440 | pop cx
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| 441 | %else
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| 442 | times %2 %3 %1, 1
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| 443 | %endif
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| 444 | %endif
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| 445 | ;-----------------------------------
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| 446 | %else
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| 447 | %3 %1, %2
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| 448 | %endif
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| 449 | %endmacro
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| 450 | %macro eSHR_IM 2
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| 451 | eSHIFT_IM %1, %2, shr
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| 452 | %endmacro
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| 453 | %macro eSHL_IM 2
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| 454 | eSHIFT_IM %1, %2, shl
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| 455 | %endmacro
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| 456 | %macro eROR_IM 2
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| 457 | eSHIFT_IM %1, %2, ror
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| 458 | %endmacro
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| 459 | %macro eROL_IM 2
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| 460 | eSHIFT_IM %1, %2, rol
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| 461 | %endmacro
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| 462 | %macro eRCR_IM 2
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| 463 | eSHIFT_IM %1, %2, rcr
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| 464 | %endmacro
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| 465 | %macro eRCL_IM 2
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| 466 | eSHIFT_IM %1, %2, rcl
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| 467 | %endmacro
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| 468 |
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| 469 |
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| 470 | ;--------------------------------------------------------------------
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| 471 | ; Emulates PUSH imm instruction when necessary.
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| 472 | ;
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| 473 | ; ePUSH_I
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| 474 | ; Parameters:
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| 475 | ; %1: Immediate to push
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| 476 | ; Returns:
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| 477 | ; Nothing
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| 478 | ; Corrupts registers:
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| 479 | ; Nothing
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| 480 | ;--------------------------------------------------------------------
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| 481 | %macro ePUSH_I 1
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| 482 | %ifndef USE_186
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| 483 | push bp ; Immediate goes here
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| 484 | push bp
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| 485 | mov bp, sp
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| 486 | mov WORD [bp+2], %1
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| 487 | pop bp
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| 488 | ;-----------------------------------
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| 489 | %else
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| 490 | push %1
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| 491 | %endif
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| 492 | %endmacro
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| 493 |
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| 494 |
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| 495 | ;--------------------------------------------------------------------
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| 496 | ; Emulates PUSH imm instruction when necessary.
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| 497 | ; ePUSH_T uses temporary register for faster performance
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| 498 | ; and smaller code size than ePUSH_I.
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| 499 | ;
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| 500 | ; ePUSH_T
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| 501 | ; Parameters:
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| 502 | ; %1: Temporary Register
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| 503 | ; %2: Immediate to push
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| 504 | ; Returns:
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| 505 | ; Nothing
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| 506 | ; Corrupts registers:
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| 507 | ; %1
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| 508 | ;--------------------------------------------------------------------
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| 509 | %macro ePUSH_T 2
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| 510 | %ifndef USE_186
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| 511 | %ifidni %2, 0
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| 512 | xor %1, %1
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| 513 | %else
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| 514 | mov %1, %2
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| 515 | %endif
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| 516 | push %1
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| 517 | ;-----------------------------------
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| 518 | %else
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| 519 | push %2
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| 520 | %endif
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| 521 | %endmacro
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| 522 |
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| 523 |
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| 524 | %endif ; EMULATE_INC
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