Index: /trunk/XTIDE_Universal_BIOS/Inc/IdeRegisters.inc
===================================================================
--- /trunk/XTIDE_Universal_BIOS/Inc/IdeRegisters.inc	(revision 275)
+++ /trunk/XTIDE_Universal_BIOS/Inc/IdeRegisters.inc	(revision 276)
@@ -81,3 +81,8 @@
 
 
+; Subcommands for COMMAND_SET_FEATURES
+FEATURE_ENABLE_WRITE_CACHE				EQU		02h
+FEATURE_DISABLE_WRITE_CACHE				EQU		82h		; Can also be used to flush cache
+
+
 %endif ; IDEREGISTERS_INC
Index: /trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc
===================================================================
--- /trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc	(revision 275)
+++ /trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc	(revision 276)
@@ -108,7 +108,15 @@
 
 ; Bit defines for DRVPARAMS.wFlags
-FLG_DRVPARAMS_USERCHS	EQU	(1<<0)	; User specified P-CHS values
-FLG_DRVPARAMS_BLOCKMODE	EQU	(1<<1)	; Enable Block mode transfers
-FLG_DRVPARAMS_USERLBA	EQU	(1<<2)	; User specified LBA values
+MASK_DRVPARAMS_WRITECACHE	EQU	(3<<0)	; Drive internal write cache settings (must start at bit 0)
+FLG_DRVPARAMS_BLOCKMODE		EQU	(1<<2)	; Enable Block mode transfers
+FLG_DRVPARAMS_USERCHS		EQU	(1<<3)	; User specified P-CHS values
+FLG_DRVPARAMS_USERLBA		EQU	(1<<4)	; User specified LBA values
+
+; Drive Write Cache values for DRVPARAMS.wFlags.MASK_DRVPARAMS_WRITECACHE
+DEFAULT_WRITE_CACHE			EQU	0		; Must be 0
+DISABLE_WRITE_CACHE			EQU	1
+ENABLE_WRITE_CACHE			EQU	2
+
+
 
 ;
Index: /trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm
===================================================================
--- /trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm	(revision 275)
+++ /trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm	(revision 276)
@@ -129,5 +129,5 @@
 
 	; Output Sector Address High (only used by LBA48)
-	eMOVZX	ax, BYTE [bp+IDEPACK.bLbaLowExt]
+	eMOVZX	ax, BYTE [bp+IDEPACK.bLbaLowExt]	; Zero sector count
 	mov		cx, [bp+IDEPACK.wLbaMiddleAndHighExt]
 	call	IDEDEVICE%+OutputSectorCountAndAddress
Index: /trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm
===================================================================
--- /trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm	(revision 275)
+++ /trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm	(revision 276)
@@ -31,5 +31,5 @@
 ;--------------------------------------------------------------------
 .StoreBlockMode:
-	mov		al, 1
+	mov		al, 1							; Block mode will be enabled on AH=9h
 	mov		ah, [es:si+ATA1.bBlckSize]		; Max block size in sectors
 	mov		[di+DPT_ATA.wSetAndMaxBlock], ax
Index: /trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH9h_HInit.asm
===================================================================
--- /trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH9h_HInit.asm	(revision 275)
+++ /trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH9h_HInit.asm	(revision 276)
@@ -41,4 +41,5 @@
 ;--------------------------------------------------------------------
 AH9h_InitializeDriveForUse:
+	push	si
 	push	cx
 
@@ -63,6 +64,10 @@
 	; Initialize CHS parameters if LBA is not used
 	call	InitializeDeviceParameters
-	jc		SHORT .RecalibrateDrive
+	jc		SHORT .SetWriteCache
 	and		BYTE [di+DPT.bFlagsHigh], ~FLGH_DPT_RESET_nINITPRMS
+
+	; Enable or Disable Write Cache
+.SetWriteCache:
+	;call	SetWriteCache
 
 	; Recalibrate drive by seeking to cylinder 0
@@ -80,4 +85,5 @@
 .ReturnNotSuccessfull:
 	pop		cx
+	pop		si
 	ret
 
@@ -110,4 +116,29 @@
 
 ;--------------------------------------------------------------------
+; SetWriteCache
+;	Parameters:
+;		DS:DI:	Ptr to DPT (in RAMVARS segment)
+;	Returns:
+;		AH:		BIOS Error code
+;		CF:		Cleared if succesfull
+;				Set if any error
+;	Corrupts registers:
+;		AL, BX, CX, DX, SI
+;--------------------------------------------------------------------
+SetWriteCache:
+	call	AccessDPT_GetPointerToDRVPARAMStoCSBX
+	mov		bl, [cs:bx+DRVPARAMS.wFlags]
+	and		bx, BYTE MASK_DRVPARAMS_WRITECACHE
+	jz		SHORT ReturnSuccessSinceInitializationNotNeeded		; DEFAULT_WRITE_CACHE
+	mov		si, [cs:bx+.rgbWriteCacheCommands]
+	jmp		AH23h_SetControllerFeatures
+
+.rgbWriteCacheCommands:
+	db		0								; DEFAULT_WRITE_CACHE
+	db		FEATURE_DISABLE_WRITE_CACHE		; DISABLE_WRITE_CACHE
+	db		FEATURE_ENABLE_WRITE_CACHE		; ENABLE_WRITE_CACHE
+
+
+;--------------------------------------------------------------------
 ; InitializeBlockMode
 ;	Parameters:
@@ -124,6 +155,10 @@
 	jz		SHORT ReturnSuccessSinceInitializationNotNeeded
 
-	mov		al, [di+DPT_ATA.bMaxBlock]	; Load max block size, zero AH
+	call	AccessDPT_GetPointerToDRVPARAMStoCSBX
+	mov		al, 1						; Disable block mode
+	test	BYTE [cs:bx+DRVPARAMS.wFlags], FLG_DRVPARAMS_BLOCKMODE
+	eCMOVNZ	al, [di+DPT_ATA.bMaxBlock]	; Load max block size
 	jmp		AH24h_SetBlockSize
 ReturnSuccessSinceInitializationNotNeeded:
+	xor		ah, ah
 	ret
Index: /trunk/XTIDE_Universal_BIOS/Src/Main.asm
===================================================================
--- /trunk/XTIDE_Universal_BIOS/Src/Main.asm	(revision 275)
+++ /trunk/XTIDE_Universal_BIOS/Src/Main.asm	(revision 276)
@@ -44,5 +44,5 @@
 	at	ROMVARS.bRomSize,	db	CNT_ROM_BLOCKS	; ROM size in 512B blocks
 	at	ROMVARS.rgbJump,	jmp	Initialize_FromMainBiosRomSearch
-	at	ROMVARS.rgbSign,	db	"XTIDE120"		; Signature for flash program
+	at	ROMVARS.rgbSign,	db	"XTIDE200"		; Signature for flash program
 	at	ROMVARS.szTitle
 		db	"-=XTIDE Universal BIOS"
@@ -54,5 +54,5 @@
 		db	" (XT)=-",NULL
 %endif
-	at	ROMVARS.szVersion,	db	"v1.2.0_wip (",__DATE__,")",NULL
+	at	ROMVARS.szVersion,	db	"v2.0.0_wip (",__DATE__,")",NULL
 
 ;;; For OR'ing into wFlags below
@@ -93,6 +93,6 @@
 	at	ROMVARS.ideVars0+IDEVARS.bDevice,		db	DEVICE_16BIT_ATA
 	at	ROMVARS.ideVars0+IDEVARS.bIRQ,			db	0
-	at	ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
 
 	at	ROMVARS.ideVars1+IDEVARS.wPort,			dw	170h			; Controller Command Block base port
@@ -100,6 +100,6 @@
 	at	ROMVARS.ideVars1+IDEVARS.bDevice,		db	DEVICE_16BIT_ATA
 	at	ROMVARS.ideVars1+IDEVARS.bIRQ,			db	0
-	at	ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
 
 	at	ROMVARS.ideVars2+IDEVARS.wPort,			dw	DEVICE_XTIDE_DEFAULT_PORT			; Controller Command Block base port
@@ -107,6 +107,6 @@
 	at	ROMVARS.ideVars2+IDEVARS.bDevice,		db	DEVICE_8BIT_DUAL_PORT_XTIDE
 	at	ROMVARS.ideVars2+IDEVARS.bIRQ,			db	0
-	at	ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
 
 	at	ROMVARS.ideVars3+IDEVARS.wPort,			dw	168h			; Controller Command Block base port
@@ -114,6 +114,6 @@
 	at	ROMVARS.ideVars3+IDEVARS.bDevice,		db	DEVICE_16BIT_ATA
 	at	ROMVARS.ideVars3+IDEVARS.bIRQ,			db	0
-	at	ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
 
 %ifdef MODULE_SERIAL
@@ -140,15 +140,15 @@
 %endif
 	at	ROMVARS.ideVars0+IDEVARS.bIRQ,			db	0				; IRQ
-	at	ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-
-	at	ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-
-	at	ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-
-	at	ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
-	at	ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+
+	at	ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+
+	at	ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+
+	at	ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
+	at	ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,	db	DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
 
 %ifdef MODULE_SERIAL
