[392] | 1 | ; Project name : XTIDE Universal BIOS |
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| 2 | ; Description : Common functions for initializing different |
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| 3 | ; VLB and PCI IDE Controllers. |
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| 4 | |
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| 5 | ; |
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[399] | 6 | ; XTIDE Universal BIOS and Associated Tools |
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[526] | 7 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team. |
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[392] | 8 | ; |
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| 9 | ; This program is free software; you can redistribute it and/or modify |
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| 10 | ; it under the terms of the GNU General Public License as published by |
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| 11 | ; the Free Software Foundation; either version 2 of the License, or |
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| 12 | ; (at your option) any later version. |
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[399] | 13 | ; |
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[392] | 14 | ; This program is distributed in the hope that it will be useful, |
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| 15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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[399] | 17 | ; GNU General Public License for more details. |
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[392] | 18 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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[399] | 19 | ; |
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[392] | 20 | |
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| 21 | ; Section containing code |
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| 22 | SECTION .text |
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| 23 | |
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| 24 | ;-------------------------------------------------------------------- |
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| 25 | ; AdvAtaInit_DetectControllerForIdeBaseInBX |
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| 26 | ; Parameters: |
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| 27 | ; BX: IDE Controller base port |
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| 28 | ; Returns: |
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| 29 | ; AX: ID WORD specific for detected controller |
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| 30 | ; Zero if no controller detected |
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| 31 | ; DX: Controller base port (not IDE) |
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| 32 | ; CF: Set if controller detected |
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| 33 | ; Cleared if no controller |
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| 34 | ; Corrupts registers: |
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[593] | 35 | ; BX, CX |
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[392] | 36 | ;-------------------------------------------------------------------- |
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| 37 | AdvAtaInit_DetectControllerForIdeBaseInBX: |
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[593] | 38 | ; Detect if system has PCI bus. If it does, we can skip VLB detection. This is |
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| 39 | ; good thing since detecting Vision QD6850 is dangerous since Intel PIIX4 south bridge |
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| 40 | ; mirrors Interrupt Controller registers from Axh to Bxh. This can lead to faulty |
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| 41 | ; detection of QD6850 that will eventually crash the system when ports are written. |
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| 42 | |
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| 43 | ; We should save the 32-bit registers but we don't since system BIOS has stored |
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| 44 | ; them already and we don't use the 32-bit registers ourselves anywhere at the moment. |
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| 45 | push bx |
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| 46 | push di |
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| 47 | xor edi, edi ; Some BIOSes require this to be set to zero |
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| 48 | mov ax, PCI_INSTALLATION_CHECK |
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| 49 | int BIOS_TIME_PCI_PNP_1Ah |
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| 50 | pop di |
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| 51 | pop bx |
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| 52 | test ah, ah |
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| 53 | jz SHORT .ThisSystemHasPCIbus |
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| 54 | |
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| 55 | ; Detect VLB controllers |
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[392] | 56 | call Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent |
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[589] | 57 | jnz SHORT .NoVisionControllerFound |
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| 58 | |
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[392] | 59 | call Vision_DoesIdePortInBXbelongToControllerWithIDinAX |
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[589] | 60 | jz SHORT .AdvancedControllerFoundForPortBX |
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| 61 | |
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| 62 | .NoVisionControllerFound: |
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[587] | 63 | call PDC20x30_DetectControllerForIdeBaseInBX |
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| 64 | jnc SHORT .NoAdvancedControllerForPortBX |
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[392] | 65 | |
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[589] | 66 | .AdvancedControllerFoundForPortBX: |
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| 67 | stc |
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[392] | 68 | ret |
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| 69 | |
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| 70 | .NoAdvancedControllerForPortBX: |
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[593] | 71 | .ThisSystemHasPCIbus: |
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[589] | 72 | xor ax, ax ; Clear ID in AX and CF |
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[392] | 73 | ret |
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| 74 | |
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| 75 | |
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| 76 | ;-------------------------------------------------------------------- |
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[564] | 77 | ; AdvAtaInit_GetControllerMaxPioModeToALandMinPioCycleTimeToBX |
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[392] | 78 | ; Parameters: |
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| 79 | ; AX: ID WORD specific for detected controller |
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| 80 | ; Returns: |
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[592] | 81 | ; AL: Max supported PIO mode (only if ZF set) |
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| 82 | ; AH: ~FLGH_DPT_IORDY if IORDY not supported, -1 otherwise (only if ZF set) |
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[582] | 83 | ; BX: Min PIO cycle time (only if ZF set) |
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| 84 | ; ZF: Set if PIO limit necessary |
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[392] | 85 | ; Cleared if no need to limit timings |
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| 86 | ; Corrupts registers: |
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[582] | 87 | ; Nothing |
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[392] | 88 | ;-------------------------------------------------------------------- |
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[587] | 89 | AdvAtaInit_GetControllerMaxPioModeToALandMinPioCycleTimeToBX: |
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| 90 | cmp ah, ID_QD6580_ALTERNATE |
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[589] | 91 | %ifdef USE_386 |
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| 92 | jae Vision_GetMaxPioModeToALandMinCycleTimeToBX |
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| 93 | jmp PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX |
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| 94 | %else |
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[587] | 95 | jae SHORT .Vision |
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| 96 | jmp PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX |
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| 97 | .Vision: |
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| 98 | jmp Vision_GetMaxPioModeToALandMinCycleTimeToBX |
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[589] | 99 | %endif |
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[392] | 100 | |
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| 101 | |
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| 102 | ;-------------------------------------------------------------------- |
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| 103 | ; AdvAtaInit_InitializeControllerForDPTinDSDI |
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| 104 | ; Parameters: |
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| 105 | ; DS:DI: Ptr to DPT for Single or Slave Drive |
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| 106 | ; Returns: |
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[507] | 107 | ; AH: Int 13h return status |
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[392] | 108 | ; CF: Cleared if success or no controller to initialize |
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| 109 | ; Set if error |
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| 110 | ; Corrupts registers: |
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[507] | 111 | ; AL, BX, CX, DX |
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[392] | 112 | ;-------------------------------------------------------------------- |
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| 113 | AdvAtaInit_InitializeControllerForDPTinDSDI: |
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| 114 | ; Call Controller Specific initialization function |
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| 115 | mov ax, [di+DPT_ADVANCED_ATA.wControllerID] |
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| 116 | test ax, ax |
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| 117 | jz SHORT .NoAdvancedController ; Return with CF cleared |
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[589] | 118 | |
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[587] | 119 | cmp ah, ID_QD6580_ALTERNATE |
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| 120 | jae SHORT .Vision |
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| 121 | jmp PDC20x30_InitializeForDPTinDSDI |
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[392] | 122 | |
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[587] | 123 | .Vision: |
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[399] | 124 | push bp |
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| 125 | push si |
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| 126 | |
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[392] | 127 | call AdvAtaInit_LoadMasterDPTtoDSSIifSlaveInDSDI |
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[589] | 128 | call Vision_InitializeWithIDinAH |
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[567] | 129 | xor ax, ax ; Success |
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[392] | 130 | |
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| 131 | pop si |
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| 132 | pop bp |
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[399] | 133 | |
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| 134 | .NoAdvancedController: |
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[392] | 135 | ret |
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| 136 | |
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| 137 | |
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| 138 | ;-------------------------------------------------------------------- |
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| 139 | ; AdvAtaInit_LoadMasterDPTtoDSSIifSlaveInDSDI |
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| 140 | ; Parameters: |
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| 141 | ; DS:DI: Ptr to DPT for Single or Slave Drive |
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| 142 | ; Returns: |
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| 143 | ; SI: Offset to Master DPT if Slave Drive present |
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| 144 | ; Zero if Slave Drive not present |
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| 145 | ; Corrupts registers: |
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[589] | 146 | ; AL |
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[392] | 147 | ;-------------------------------------------------------------------- |
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| 148 | AdvAtaInit_LoadMasterDPTtoDSSIifSlaveInDSDI: |
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| 149 | ; Must be Slave Drive if previous DPT has same IDEVARS offset |
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| 150 | lea si, [di-LARGEST_DPT_SIZE] ; DS:SI points to previous DPT |
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| 151 | mov al, [di+DPT.bIdevarsOffset] |
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| 152 | cmp al, [si+DPT.bIdevarsOffset] |
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| 153 | je SHORT .MasterAndSlaveDrivePresent |
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| 154 | |
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| 155 | ; We only have single drive so zero SI |
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| 156 | xor si, si |
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| 157 | .MasterAndSlaveDrivePresent: |
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| 158 | ret |
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| 159 | |
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| 160 | |
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| 161 | ;-------------------------------------------------------------------- |
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| 162 | ; AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI |
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| 163 | ; Parameters: |
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| 164 | ; DS:DI: Ptr to DPT for Single or Slave Drive |
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| 165 | ; SI: Offset to Master DPT if Slave Drive present |
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| 166 | ; Zero if Slave Drive not present |
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| 167 | ; Returns: |
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| 168 | ; BX: Best common PIO mode |
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| 169 | ; CX: Slowest common PIO Cycle Time in nanosecs |
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| 170 | ; Corrupts registers: |
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| 171 | ; Nothing |
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| 172 | ;-------------------------------------------------------------------- |
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| 173 | AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI: |
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| 174 | eMOVZX bx, [di+DPT_ADVANCED_ATA.bPioMode] |
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| 175 | mov cx, [di+DPT_ADVANCED_ATA.wMinPioCycleTime] |
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| 176 | test si, si |
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[568] | 177 | jz SHORT .PioTimingsLoadedToBXandCX |
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[392] | 178 | MIN_U bl, [si+DPT_ADVANCED_ATA.bPioMode] |
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| 179 | MAX_U cx, [si+DPT_ADVANCED_ATA.wMinPioCycleTime] |
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[568] | 180 | .PioTimingsLoadedToBXandCX: |
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[392] | 181 | ret |
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