source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc @ 542

Last change on this file since 542 was 542, checked in by aitotat@…, 11 years ago

Changes to XTIDE Universal BIOS:

  • Fixed a bug that allowed EBIOS functions for user defined CHS.
  • Simplified user defined CHS and LBA setup a little.
File size: 5.5 KB
RevLine 
[99]1; Project name  :   XTIDE Universal BIOS
[3]2; Description   :   Defines for DPT structs containing custom
3;                   Disk Parameter Table used by this BIOS.
[376]4
5;
[399]6; XTIDE Universal BIOS and Associated Tools
[526]7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
[376]8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
[399]13;
[376]14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
[399]17; GNU General Public License for more details.
[376]18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
[3]21%ifndef CUSTOMDPT_INC
22%define CUSTOMDPT_INC
23
[150]24; Base DPT for all device types
[472]25struc DPT
[473]26    ; General Disk Parameter Table related
[158]27    .wFlags:
[399]28    .bFlagsLow              resb    1
29    .bFlagsHigh             resb    1
30    .bIdevarsOffset         resb    1   ; Offset to IDEVARS for this drive
[422]31    .bInitError             resb    1   ; Flags for AH=09h initialization errors
[536]32    .wBasePort              resb    2   ; Segment for JR-IDE/ISA and ADP50L
[3]33
[473]34    ; CHS variables
[421]35    .wLchsCylinders         resb    2   ; (1...1027, yes 1027)
36    .wLchsHeadsAndSectors:
37    .bLchsHeads             resb    1   ; (1...255)
38    .bLchsSectorsPerTrack   resb    1   ; (1...63)
[542]39    .wPchsHeadsAndSectors:
[422]40    .bPchsHeads             resb    1   ; (1...16)
[542]41    .bPchsSectorsPerTrack   resb    1   ; (1...63)
[238]42
[422]43    ; LBA and remaining P-CHS variables
[421]44%ifdef MODULE_EBIOS
[422]45    .wPchsCylinders         resb    2
[421]46    .twLbaSectors           resb    6   ; 48-bit sector count for LBA addressing
47%endif
[491]48                            alignb  2   ; WORD alignment for DPT_SERIAL or DPT_ATA
[150]49endstruc
[3]50
[399]51    ; Bit definitions for DPT.bFlagsLow
[421]52    MASKL_DPT_CHS_SHIFT_COUNT           EQU (3<<0)              ; Bits 0...1, P-CHS to L-CHS bit shift count (0...3)
[422]53    MASKL_DPT_TRANSLATEMODE             EQU MASK_DRVPARAMS_TRANSLATEMODE    ; Bits 2...3, NORMAL, LARGE or Assisted LBA addressing mode
54    FLGL_DPT_ASSISTED_LBA               EQU (1<<(TRANSLATEMODE_FIELD_POSITION+1))
[421]55    FLGL_DPT_SLAVE                      EQU FLG_DRVNHEAD_DRV    ; Bit 4, Drive is a Slave Drive
[411]56%ifdef MODULE_IRQ
[421]57    FLGL_DPT_ENABLE_IRQ                 EQU (1<<5)              ; Bit 5, Enable IRQ
[411]58%endif
[542]59    FLGL_DPT_LBA                        EQU FLG_DRVNHEAD_LBA    ; Bit 6, Drive supports LBA and so EBIOS functions can be supported
[421]60%ifdef MODULE_EBIOS
61    FLGL_DPT_LBA48                      EQU (1<<7)              ; Bit 7, Drive supports 48-bit LBA (Must be bit 7!)
62%endif
[3]63
[421]64
[399]65    ; Bit definitions for DPT.bFlagsHigh
[421]66    FLGH_DPT_BLOCK_MODE_SUPPORTED       EQU (1<<1)  ; Bit 1, Use block transfer commands (must be bit 1!)
[411]67%ifdef MODULE_SERIAL
[421]68    FLGH_DPT_SERIAL_DEVICE              EQU (1<<2)  ; Bit 2, Serial Port Device
[411]69%endif
70%ifdef MODULE_FEATURE_SETS
[505]71    FLGH_DPT_POWER_MANAGEMENT_SUPPORTED EQU (1<<5)  ; Bit 5, Drive supports power management
[411]72%endif
73%ifdef MODULE_ADVANCED_ATA
[505]74    FLGH_DPT_IORDY                      EQU (1<<7)  ; Bit 7, Controller and Drive supports IORDY
[411]75%endif
[363]76
[399]77    ; Serial device only
[411]78%ifdef MODULE_SERIAL_FLOPPY
[399]79    FLGH_DPT_SERIAL_FLOPPY                      EQU (1<<4)
80    FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK            EQU 0e0h
81    FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION  EQU 5
[411]82%endif
[258]83
[3]84
[422]85    ; Flags for DPT_ADVANCED_ATA.bInitError
86    FLG_INITERROR_FAILED_TO_SELECT_DRIVE                EQU (1<<0)
87    FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS   EQU (1<<1)
88    FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE             EQU (1<<2)
89    FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE           EQU (1<<3)
90    FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE              EQU (1<<4)
91    FLG_INITERROR_FAILED_TO_SET_PIO_MODE                EQU (1<<5)
92    FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER    EQU (1<<6)
[473]93    FLG_INITERROR_FAILED_TO_SET_XTCF_MODE               EQU (1<<7)
[480]94    FLG_INITERROR_FAILED_TO_SET_8BIT_MODE               EQU FLG_INITERROR_FAILED_TO_SET_XTCF_MODE
[363]95
[422]96
97
[363]98; DPT for ATA devices
[473]99struc DPT_ATA
[399]100    .dpt                    resb    DPT_size
[473]101    .bDevice                resb    1   ; Device Type from IDEVARS (overrided when 32-bit controller detected)
[399]102    .bBlockSize             resb    1   ; Current block size in sectors (do not set to zero!)
[363]103endstruc
104
105
[421]106
[364]107; Additional variables needed to initialize and reset Advanced IDE Controllers.
108; EBDA must be reserved for DPTs when using these!
[363]109%ifdef MODULE_ADVANCED_ATA
[473]110struc DPT_ADVANCED_ATA
[363]111    .dpt_ata                resb    DPT_ATA_size
[364]112    .wControllerID          resb    2   ; Controller specific ID WORD (from Advanced Controller detection)
[363]113    .wControllerBasePort    resb    2   ; Advanced Controller port (not IDE port)
[364]114    .wMinPioCycleTime       resb    2   ; Minimum PIO Cycle Time in ns
115    .bPioMode               resb    1   ; Best supported PIO mode
[472]116                            alignb  2
[363]117endstruc
[411]118%endif
[363]119
[400]120
[364]121; DPT for Serial devices
[363]122%ifdef MODULE_SERIAL
[473]123struc DPT_SERIAL
[399]124    .dpt                    resb    DPT_size
[363]125    .wSerialPortAndBaud:
[399]126    .bSerialPort            resb    1   ; Serial connection I/O port address, divided by 4
127    .bSerialBaud            resb    1   ; Serial connection baud rate divisor
[363]128endstruc
[474]129
130; On performance critical situations we compare DPT_ATA.bDevice without checking FLGH_DPT_SERIAL_DEVICE
131; first! DPT_ATA.bDevice uses small values so there will be no problems.
[488]132%ifndef CHECK_FOR_UNUSED_ENTRYPOINTS
[491]133    %if DPT_SERIAL.bSerialPort <> DPT_ATA.bDevice
134        %error "DPT_ATA.bDevice and DPT_SERIAL.bSerialPort must be in same offsets!"
135    %endif
[363]136%endif
[491]137%endif ; MODULE_SERIAL
[363]138
139
140; This is the common size for all DPTs. All DPTs must be equal size.
[364]141%ifdef MODULE_ADVANCED_ATA
[399]142    LARGEST_DPT_SIZE            EQU     DPT_ADVANCED_ATA_size
[364]143%else
[399]144    LARGEST_DPT_SIZE            EQU     DPT_ATA_size
[364]145%endif
[363]146
147
[399]148    ; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
149    ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
150    MAX_LCHS_CYLINDERS          EQU     1024
151    LBA_ASSIST_SPT              EQU     63
[3]152
[173]153
[3]154%endif ; CUSTOMDPT_INC
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