| 1 | ; Project name : XTIDE Universal BIOS |
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| 2 | ; Description : Lo-tech XT-CFv2 board specifications. |
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| 3 | ; |
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| 4 | ; More information at http://www.lo-tech.co.uk/wiki/Lo-tech_XT-CFv2_Board |
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| 5 | |
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| 6 | ; |
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| 7 | ; XTIDE Universal BIOS and Associated Tools |
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| 8 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. |
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| 9 | ; |
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| 10 | ; This program is free software; you can redistribute it and/or modify |
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| 11 | ; it under the terms of the GNU General Public License as published by |
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| 12 | ; the Free Software Foundation; either version 2 of the License, or |
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| 13 | ; (at your option) any later version. |
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| 14 | ; |
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| 15 | ; This program is distributed in the hope that it will be useful, |
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| 16 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 17 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 18 | ; GNU General Public License for more details. |
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| 19 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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| 20 | ; |
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| 21 | |
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| 22 | %ifndef XTCF_INC |
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| 23 | %define XTCF_INC |
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| 24 | |
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| 25 | ; Possible base addresses. Note that all XT-CF IDE registers are SHL 1 compared |
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| 26 | ; to standard IDE registers. |
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| 27 | XTCF_BASE_PORT_1 EQU 200h |
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| 28 | XTCF_BASE_PORT_2 EQU 240h |
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| 29 | XTCF_BASE_PORT_3 EQU 300h ; Default setting |
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| 30 | XTCF_BASE_PORT_4 EQU 320h |
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| 31 | |
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| 32 | |
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| 33 | ; XT-CF Control Register (do not SHL 1 these!) |
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| 34 | XTCF_CONTROL_REGISTER EQU 1Fh |
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| 35 | XTCT_CONTROL_REGISTER_INVERTED_in EQU 1Eh |
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| 36 | |
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| 37 | |
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| 38 | ; Bit Definitions for XT-CF Control Register |
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| 39 | MASK_XTCF_BASE_PORT_in EQU (3<<0) ; Bits 0...1 |
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| 40 | XTCF_PORT_200h EQU 0 |
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| 41 | XTCF_PORT_240h EQU 1 |
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| 42 | XTCF_PORT_300h EQU 2 ; Default |
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| 43 | XTCF_PORT_320h EQU 3 |
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| 44 | FLG_PIO8_INSTEAD_OF_DMA EQU (1<<2) ; Set to enable PIO8, clear to enable DMA (Channel 3) |
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| 45 | FLG_AT_ZERO_WAIT_STATE_in EQU (1<<3) |
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| 46 | MASK_SECTOR_WINDOW_SEGMENT_in EQU (7<<4) ; Bits 4...6 |
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| 47 | XTCF_SECTOR_WINDOW_AT_C000h EQU 0 |
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| 48 | XTCF_SECTOR_WINDOW_AT_C800h EQU 1 |
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| 49 | XTCF_SECTOR_WINDOW_AT_D000h EQU 2 ; Default |
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| 50 | XTCF_SECTOR_WINDOW_AT_D800h EQU 3 |
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| 51 | XTCF_SECTOR_WINDOW_AT_E000h EQU 4 |
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| 52 | XTCF_SECTOR_WINDOW_AT_E800h EQU 5 |
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| 53 | FLG_XTCF_ROM_ENABLE_in EQU (1<<7) |
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| 54 | |
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| 55 | |
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| 56 | %endif ; XTCF_INC |
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