1 | ; Project name : Assembly Library |
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2 | ; Description : Macros for using NEC V20/V30 specific instructions. |
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3 | |
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4 | ; |
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5 | ; XTIDE Universal BIOS and Associated Tools |
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6 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team. |
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7 | ; |
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8 | ; This program is free software; you can redistribute it and/or modify |
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9 | ; it under the terms of the GNU General Public License as published by |
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10 | ; the Free Software Foundation; either version 2 of the License, or |
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11 | ; (at your option) any later version. |
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12 | ; |
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13 | ; This program is distributed in the hope that it will be useful, |
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14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | ; GNU General Public License for more details. |
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17 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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18 | ; |
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19 | |
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20 | %ifndef NEC_V_INC |
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21 | %define NEC_V_INC |
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22 | |
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23 | regAL equ 000b |
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24 | regCL equ 001b |
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25 | regDL equ 010b |
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26 | regBL equ 011b |
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27 | regAH equ 100b |
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28 | regCH equ 101b |
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29 | regDH equ 110b |
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30 | regBH equ 111b |
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31 | |
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32 | regAX equ regAL |
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33 | regCX equ regCL |
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34 | regDX equ regDL |
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35 | regBX equ regBL |
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36 | regSP equ regAH |
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37 | regBP equ regCH |
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38 | regSI equ regDH |
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39 | regDI equ regBH |
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40 | |
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41 | |
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42 | ;-------------------------------------------------------------------- |
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43 | ; The REPC string instruction prefix available on NEC V20/V30 CPUs. |
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44 | ; |
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45 | ; Repeats the following string instruction (CMPS or SCAS) |
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46 | ; while CF=1 and CX<>0. |
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47 | ; |
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48 | ; eREPC |
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49 | ; Parameters: |
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50 | ; %1: String instruction (optional for this macro) |
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51 | ; CX: String length in BYTEs or WORDs |
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52 | ; xS:SI: Pointer to source string. Default segment is DS but can be overridden |
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53 | ; ES:DI: Pointer to destination string |
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54 | ; Returns: |
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55 | ; CF/CX: Depends on the result from the string instruction. |
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56 | ; If CF clear, then CX contains the remaining number of |
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57 | ; BYTEs or WORDs in the string. If CF set, then CX=0. |
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58 | ; SI/DI: Updated depending on the string instruction used and |
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59 | ; state of the direction flag. |
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60 | ; Corrupts registers: |
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61 | ; The string instruction corrupts FLAGS. The prefix corrupts nothing. |
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62 | ;-------------------------------------------------------------------- |
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63 | %macro eREPC 0-1.nolist |
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64 | db 65h |
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65 | %ifnempty %1 |
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66 | %1 |
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67 | %endif |
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68 | %endmacro |
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69 | |
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70 | |
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71 | ;-------------------------------------------------------------------- |
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72 | ; The REPNC string instruction prefix available on NEC V20/V30 CPUs. |
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73 | ; |
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74 | ; Repeats the following string instruction (CMPS or SCAS) |
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75 | ; while CF=0 and CX<>0. |
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76 | ; |
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77 | ; eREPNC |
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78 | ; Parameters: |
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79 | ; %1: String instruction (optional for this macro) |
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80 | ; CX: String length in BYTEs or WORDs |
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81 | ; xS:SI: Pointer to source string. Default segment is DS but can be overridden |
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82 | ; ES:DI: Pointer to destination string |
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83 | ; Returns: |
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84 | ; CF/CX: Depends on the result from the string instruction. |
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85 | ; If CF set, then CX contains the remaining number of |
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86 | ; BYTEs or WORDs in the string. If CF clear, then CX=0. |
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87 | ; SI/DI: Updated depending on the string instruction used and |
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88 | ; state of the direction flag. |
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89 | ; Corrupts registers: |
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90 | ; The string instruction corrupts FLAGS. The prefix corrupts nothing. |
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91 | ;-------------------------------------------------------------------- |
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92 | %macro eREPNC 0-1.nolist |
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93 | db 64h |
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94 | %ifnempty %1 |
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95 | %1 |
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96 | %endif |
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97 | %endmacro |
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98 | |
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99 | |
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100 | ;-------------------------------------------------------------------- |
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101 | ; The CLR1 instruction available on NEC V20/V30 CPUs. |
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102 | ; |
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103 | ; Clears bit indexed by Source in Destination. |
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104 | ; |
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105 | ; eCLR1 |
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106 | ; Parameters: |
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107 | ; %1: Destination (register or memory location) |
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108 | ; %2: Source (CL or immediate value) |
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109 | ; Returns: |
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110 | ; Nothing |
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111 | ; Corrupts registers: |
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112 | ; Nothing (not even FLAGS) |
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113 | ;-------------------------------------------------------------------- |
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114 | %macro eCLR1 2.nolist |
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115 | %assign w 0 |
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116 | %assign i 0 |
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117 | %ifnidni %2, cl |
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118 | %assign i (1 << 3) |
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119 | %endif |
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120 | FSIS ], %1 |
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121 | %if strpos |
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122 | FSIS BYTE, %1 |
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123 | %ifn strpos = 1 |
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124 | FSIS WORD, %1 |
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125 | %if strpos = 1 |
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126 | %assign w 1 |
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127 | %elif i |
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128 | %if %2 > 7 |
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129 | %assign w 1 |
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130 | %endif |
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131 | %else |
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132 | %error "Memory operand needs a size specifier!" |
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133 | %endif |
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134 | %endif |
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135 | %assign m (00b << 6) |
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136 | FSIS [bx+si], %1 |
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137 | %if strpos |
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138 | %assign rm 000b |
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139 | %else |
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140 | FSIS [bx+di], %1 |
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141 | %if strpos |
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142 | %assign rm 001b |
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143 | %else |
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144 | FSIS [bp+si], %1 |
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145 | %if strpos |
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146 | %assign rm 010b |
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147 | %else |
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148 | FSIS [bp+di], %1 |
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149 | %if strpos |
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150 | %assign rm 011b |
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151 | %else |
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152 | FSIS [si], %1 |
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153 | %if strpos |
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154 | %assign rm 100b |
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155 | %else |
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156 | FSIS [di], %1 |
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157 | %if strpos |
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158 | %assign rm 101b |
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159 | %else |
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160 | FSIS [bx], %1 |
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161 | %if strpos |
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162 | %assign rm 111b |
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163 | %else |
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164 | %error "Memory operands are not (yet) fully supported by the eCLR1 macro!" |
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165 | %endif |
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166 | %endif |
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167 | %endif |
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168 | %endif |
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169 | %endif |
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170 | %endif |
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171 | %endif |
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172 | %else |
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173 | %assign m (11b << 6) |
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174 | %ifidni %1, ax |
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175 | %assign w 1 |
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176 | %assign rm regAX |
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177 | %elifidni %1, bx |
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178 | %assign w 1 |
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179 | %assign rm regBX |
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180 | %elifidni %1, cx |
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181 | %assign w 1 |
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182 | %assign rm regCX |
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183 | %elifidni %1, dx |
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184 | %assign w 1 |
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185 | %assign rm regDX |
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186 | %elifidni %1, bp |
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187 | %assign w 1 |
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188 | %assign rm regBP |
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189 | %elifidni %1, sp |
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190 | %assign w 1 |
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191 | %assign rm regSP |
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192 | %elifidni %1, si |
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193 | %assign w 1 |
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194 | %assign rm regSI |
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195 | %elifidni %1, di |
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196 | %assign w 1 |
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197 | %assign rm regDI |
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198 | %elifidni %1, al |
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199 | %assign rm regAL |
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200 | %elifidni %1, ah |
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201 | %assign rm regAH |
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202 | %elifidni %1, bl |
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203 | %assign rm regBL |
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204 | %elifidni %1, bh |
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205 | %assign rm regBH |
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206 | %elifidni %1, cl |
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207 | %assign rm regCL |
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208 | %elifidni %1, ch |
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209 | %assign rm regCH |
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210 | %elifidni %1, dl |
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211 | %assign rm regDL |
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212 | %elifidni %1, dh |
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213 | %assign rm regDH |
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214 | %else |
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215 | %error Invalid parameter passed to eCLR1! (%1) |
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216 | %endif |
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217 | %endif |
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218 | db 0Fh, 12h | i | w, m | rm |
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219 | %if i |
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220 | db %2 |
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221 | %if w |
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222 | %if %2 > 15 |
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223 | %warning Possibly invalid parameter passed to eCLR1! (%2 > 15) |
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224 | %endif |
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225 | %else |
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226 | %if %2 > 7 |
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227 | %warning Possibly invalid parameter passed to eCLR1! (%2 > 7) |
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228 | %endif |
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229 | %endif |
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230 | %endif |
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231 | %endmacro |
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232 | |
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233 | |
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234 | ;-------------------------------------------------------------------- |
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235 | ; The SET1 instruction available on NEC V20/V30 CPUs. |
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236 | ; |
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237 | ; Sets bit indexed by Source in Destination. |
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238 | ; |
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239 | ; eSET1 |
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240 | ; Parameters: |
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241 | ; %1: Destination (register or memory location) |
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242 | ; %2: Source (CL or immediate value) |
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243 | ; Returns: |
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244 | ; Nothing |
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245 | ; Corrupts registers: |
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246 | ; Nothing (not even FLAGS) |
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247 | ;-------------------------------------------------------------------- |
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248 | %macro eSET1 2.nolist |
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249 | %assign w 0 |
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250 | %assign i 0 |
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251 | %ifnidni %2, cl |
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252 | %assign i (1 << 3) |
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253 | %endif |
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254 | FSIS ], %1 |
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255 | %if strpos |
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256 | FSIS BYTE, %1 |
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257 | %ifn strpos = 1 |
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258 | FSIS WORD, %1 |
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259 | %if strpos = 1 |
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260 | %assign w 1 |
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261 | %elif i |
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262 | %if %2 > 7 |
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263 | %assign w 1 |
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264 | %endif |
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265 | %else |
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266 | %error "Memory operand needs a size specifier!" |
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267 | %endif |
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268 | %endif |
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269 | %assign m (00b << 6) |
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270 | FSIS [bx+si], %1 |
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271 | %if strpos |
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272 | %assign rm 000b |
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273 | %else |
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274 | FSIS [bx+di], %1 |
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275 | %if strpos |
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276 | %assign rm 001b |
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277 | %else |
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278 | FSIS [bp+si], %1 |
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279 | %if strpos |
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280 | %assign rm 010b |
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281 | %else |
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282 | FSIS [bp+di], %1 |
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283 | %if strpos |
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284 | %assign rm 011b |
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285 | %else |
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286 | FSIS [si], %1 |
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287 | %if strpos |
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288 | %assign rm 100b |
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289 | %else |
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290 | FSIS [di], %1 |
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291 | %if strpos |
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292 | %assign rm 101b |
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293 | %else |
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294 | FSIS [bx], %1 |
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295 | %if strpos |
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296 | %assign rm 111b |
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297 | %else |
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298 | %error "Memory operands are not (yet) fully supported by the eSET1 macro!" |
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299 | %endif |
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300 | %endif |
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301 | %endif |
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302 | %endif |
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303 | %endif |
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304 | %endif |
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305 | %endif |
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306 | %else |
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307 | %assign m (11b << 6) |
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308 | %ifidni %1, ax |
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309 | %assign w 1 |
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310 | %assign rm regAX |
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311 | %elifidni %1, bx |
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312 | %assign w 1 |
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313 | %assign rm regBX |
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314 | %elifidni %1, cx |
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315 | %assign w 1 |
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316 | %assign rm regCX |
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317 | %elifidni %1, dx |
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318 | %assign w 1 |
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319 | %assign rm regDX |
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320 | %elifidni %1, bp |
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321 | %assign w 1 |
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322 | %assign rm regBP |
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323 | %elifidni %1, sp |
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324 | %assign w 1 |
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325 | %assign rm regSP |
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326 | %elifidni %1, si |
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327 | %assign w 1 |
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328 | %assign rm regSI |
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329 | %elifidni %1, di |
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330 | %assign w 1 |
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331 | %assign rm regDI |
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332 | %elifidni %1, al |
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333 | %assign rm regAL |
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334 | %elifidni %1, ah |
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335 | %assign rm regAH |
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336 | %elifidni %1, bl |
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337 | %assign rm regBL |
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338 | %elifidni %1, bh |
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339 | %assign rm regBH |
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340 | %elifidni %1, cl |
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341 | %assign rm regCL |
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342 | %elifidni %1, ch |
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343 | %assign rm regCH |
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344 | %elifidni %1, dl |
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345 | %assign rm regDL |
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346 | %elifidni %1, dh |
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347 | %assign rm regDH |
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348 | %else |
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349 | %error Invalid parameter passed to eSET1! (%1) |
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350 | %endif |
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351 | %endif |
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352 | db 0Fh, 14h | i | w, m | rm |
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353 | %if i |
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354 | db %2 |
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355 | %if w |
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356 | %if %2 > 15 |
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357 | %warning Possibly invalid parameter passed to eSET1! (%2 > 15) |
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358 | %endif |
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359 | %else |
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360 | %if %2 > 7 |
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361 | %warning Possibly invalid parameter passed to eSET1! (%2 > 7) |
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362 | %endif |
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363 | %endif |
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364 | %endif |
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365 | %endmacro |
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366 | |
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367 | |
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368 | ;-------------------------------------------------------------------- |
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369 | ; The NOT1 instruction available on NEC V20/V30 CPUs. |
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370 | ; |
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371 | ; Inverts bit indexed by Source in Destination. |
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372 | ; |
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373 | ; eNOT1 |
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374 | ; Parameters: |
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375 | ; %1: Destination (register or memory location) |
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376 | ; %2: Source (CL or immediate value) |
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377 | ; Returns: |
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378 | ; Nothing |
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379 | ; Corrupts registers: |
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380 | ; Nothing (not even FLAGS) |
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381 | ;-------------------------------------------------------------------- |
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382 | %macro eNOT1 2.nolist |
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383 | %assign w 0 |
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384 | %assign i 0 |
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385 | %ifnidni %2, cl |
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386 | %assign i (1 << 3) |
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387 | %endif |
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388 | FSIS ], %1 |
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389 | %if strpos |
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390 | FSIS BYTE, %1 |
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391 | %ifn strpos = 1 |
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392 | FSIS WORD, %1 |
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393 | %if strpos = 1 |
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394 | %assign w 1 |
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395 | %elif i |
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396 | %if %2 > 7 |
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397 | %assign w 1 |
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398 | %endif |
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399 | %else |
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400 | %error "Memory operand needs a size specifier!" |
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401 | %endif |
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402 | %endif |
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403 | %assign m (00b << 6) |
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404 | FSIS [bx+si], %1 |
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405 | %if strpos |
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406 | %assign rm 000b |
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407 | %else |
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408 | FSIS [bx+di], %1 |
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409 | %if strpos |
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410 | %assign rm 001b |
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411 | %else |
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412 | FSIS [bp+si], %1 |
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413 | %if strpos |
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414 | %assign rm 010b |
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415 | %else |
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416 | FSIS [bp+di], %1 |
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417 | %if strpos |
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418 | %assign rm 011b |
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419 | %else |
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420 | FSIS [si], %1 |
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421 | %if strpos |
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422 | %assign rm 100b |
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423 | %else |
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424 | FSIS [di], %1 |
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425 | %if strpos |
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426 | %assign rm 101b |
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427 | %else |
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428 | FSIS [bx], %1 |
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429 | %if strpos |
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430 | %assign rm 111b |
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431 | %else |
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432 | %error "Memory operands are not (yet) fully supported by the eNOT1 macro!" |
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433 | %endif |
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434 | %endif |
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435 | %endif |
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436 | %endif |
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437 | %endif |
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438 | %endif |
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439 | %endif |
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440 | %else |
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441 | %assign m (11b << 6) |
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442 | %ifidni %1, ax |
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443 | %assign w 1 |
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444 | %assign rm regAX |
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445 | %elifidni %1, bx |
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446 | %assign w 1 |
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447 | %assign rm regBX |
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448 | %elifidni %1, cx |
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449 | %assign w 1 |
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450 | %assign rm regCX |
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451 | %elifidni %1, dx |
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452 | %assign w 1 |
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453 | %assign rm regDX |
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454 | %elifidni %1, bp |
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455 | %assign w 1 |
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456 | %assign rm regBP |
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457 | %elifidni %1, sp |
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458 | %assign w 1 |
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459 | %assign rm regSP |
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460 | %elifidni %1, si |
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461 | %assign w 1 |
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462 | %assign rm regSI |
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463 | %elifidni %1, di |
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464 | %assign w 1 |
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465 | %assign rm regDI |
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466 | %elifidni %1, al |
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467 | %assign rm regAL |
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468 | %elifidni %1, ah |
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469 | %assign rm regAH |
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470 | %elifidni %1, bl |
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471 | %assign rm regBL |
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472 | %elifidni %1, bh |
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473 | %assign rm regBH |
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474 | %elifidni %1, cl |
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475 | %assign rm regCL |
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476 | %elifidni %1, ch |
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477 | %assign rm regCH |
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478 | %elifidni %1, dl |
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479 | %assign rm regDL |
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480 | %elifidni %1, dh |
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481 | %assign rm regDH |
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482 | %else |
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483 | %error Invalid parameter passed to eNOT1! (%1) |
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484 | %endif |
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485 | %endif |
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486 | db 0Fh, 16h | i | w, m | rm |
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487 | %if i |
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488 | db %2 |
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489 | %if w |
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490 | %if %2 > 15 |
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491 | %warning Possibly invalid parameter passed to eNOT1! (%2 > 15) |
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492 | %endif |
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493 | %else |
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494 | %if %2 > 7 |
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495 | %warning Possibly invalid parameter passed to eNOT1! (%2 > 7) |
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496 | %endif |
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497 | %endif |
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498 | %endif |
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499 | %endmacro |
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500 | |
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501 | |
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502 | ;-------------------------------------------------------------------- |
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503 | ; The TEST1 instruction available on NEC V20/V30 CPUs. |
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504 | ; |
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505 | ; Tests bit indexed by Source in Destination. |
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506 | ; |
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507 | ; eTEST1 |
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508 | ; Parameters: |
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509 | ; %1: Destination (register or memory location) |
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510 | ; %2: Source (CL or immediate value) |
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511 | ; Returns: |
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512 | ; ZF: Set if tested bit is zero |
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513 | ; Cleared if tested bit is not zero |
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514 | ; CF: Cleared |
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515 | ; OF: Cleared |
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516 | ; Corrupts registers: |
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517 | ; All other FLAGS |
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518 | ;-------------------------------------------------------------------- |
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519 | %macro eTEST1 2.nolist |
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520 | %assign w 0 |
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521 | %assign i 0 |
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522 | %ifnidni %2, cl |
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523 | %assign i (1 << 3) |
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524 | %endif |
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525 | FSIS ], %1 |
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526 | %if strpos |
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527 | FSIS BYTE, %1 |
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528 | %ifn strpos = 1 |
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529 | FSIS WORD, %1 |
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530 | %if strpos = 1 |
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531 | %assign w 1 |
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532 | %elif i |
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533 | %if %2 > 7 |
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534 | %assign w 1 |
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535 | %endif |
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536 | %else |
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537 | %error "Memory operand needs a size specifier!" |
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538 | %endif |
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539 | %endif |
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540 | %assign m (00b << 6) |
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541 | FSIS [bx+si], %1 |
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542 | %if strpos |
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543 | %assign rm 000b |
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544 | %else |
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545 | FSIS [bx+di], %1 |
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546 | %if strpos |
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547 | %assign rm 001b |
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548 | %else |
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549 | FSIS [bp+si], %1 |
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550 | %if strpos |
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551 | %assign rm 010b |
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552 | %else |
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553 | FSIS [bp+di], %1 |
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554 | %if strpos |
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555 | %assign rm 011b |
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556 | %else |
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557 | FSIS [si], %1 |
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558 | %if strpos |
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559 | %assign rm 100b |
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560 | %else |
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561 | FSIS [di], %1 |
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562 | %if strpos |
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563 | %assign rm 101b |
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564 | %else |
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565 | FSIS [bx], %1 |
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566 | %if strpos |
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567 | %assign rm 111b |
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568 | %else |
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569 | %error "Memory operands are not (yet) fully supported by the eTEST1 macro!" |
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570 | %endif |
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571 | %endif |
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572 | %endif |
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573 | %endif |
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574 | %endif |
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575 | %endif |
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576 | %endif |
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577 | %else |
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578 | %assign m (11b << 6) |
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579 | %ifidni %1, ax |
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580 | %assign w 1 |
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581 | %assign rm regAX |
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582 | %elifidni %1, bx |
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583 | %assign w 1 |
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584 | %assign rm regBX |
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585 | %elifidni %1, cx |
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586 | %assign w 1 |
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587 | %assign rm regCX |
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588 | %elifidni %1, dx |
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589 | %assign w 1 |
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590 | %assign rm regDX |
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591 | %elifidni %1, bp |
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592 | %assign w 1 |
---|
593 | %assign rm regBP |
---|
594 | %elifidni %1, sp |
---|
595 | %assign w 1 |
---|
596 | %assign rm regSP |
---|
597 | %elifidni %1, si |
---|
598 | %assign w 1 |
---|
599 | %assign rm regSI |
---|
600 | %elifidni %1, di |
---|
601 | %assign w 1 |
---|
602 | %assign rm regDI |
---|
603 | %elifidni %1, al |
---|
604 | %assign rm regAL |
---|
605 | %elifidni %1, ah |
---|
606 | %assign rm regAH |
---|
607 | %elifidni %1, bl |
---|
608 | %assign rm regBL |
---|
609 | %elifidni %1, bh |
---|
610 | %assign rm regBH |
---|
611 | %elifidni %1, cl |
---|
612 | %assign rm regCL |
---|
613 | %elifidni %1, ch |
---|
614 | %assign rm regCH |
---|
615 | %elifidni %1, dl |
---|
616 | %assign rm regDL |
---|
617 | %elifidni %1, dh |
---|
618 | %assign rm regDH |
---|
619 | %else |
---|
620 | %error Invalid parameter passed to eTEST1! (%1) |
---|
621 | %endif |
---|
622 | %endif |
---|
623 | db 0Fh, 10h | i | w, m | rm |
---|
624 | %if i |
---|
625 | db %2 |
---|
626 | %if w |
---|
627 | %if %2 > 15 |
---|
628 | %warning Possibly invalid parameter passed to eTEST1! (%2 > 15) |
---|
629 | %endif |
---|
630 | %else |
---|
631 | %if %2 > 7 |
---|
632 | %warning Possibly invalid parameter passed to eTEST1! (%2 > 7) |
---|
633 | %endif |
---|
634 | %endif |
---|
635 | %endif |
---|
636 | %endmacro |
---|
637 | |
---|
638 | |
---|
639 | ;-------------------------------------------------------------------- |
---|
640 | ; The EXT instruction available on NEC V20/V30 CPUs. |
---|
641 | ; |
---|
642 | ; Loads AX with a zero-extended bitfield, from [xS:SI] plus an additional |
---|
643 | ; bit offset specified in Destination, with Source+1 number of bits. |
---|
644 | ; Both Source and Destination must be at most 15. |
---|
645 | ; |
---|
646 | ; eEXT |
---|
647 | ; Parameters: |
---|
648 | ; xS:SI: Pointer to bitfield. Default segment is DS but can be overridden |
---|
649 | ; %1: Destination (8-bit register) |
---|
650 | ; %2: Source (8-bit register or immediate value) |
---|
651 | ; Returns: |
---|
652 | ; AX: Extracted bitfield |
---|
653 | ; %1: (%1 + %2 + 1) MOD 16 |
---|
654 | ; SI: SI + 2 (but only if %1 wrapped around) |
---|
655 | ; Corrupts registers: |
---|
656 | ; FLAGS |
---|
657 | ;-------------------------------------------------------------------- |
---|
658 | %macro eEXT 2.nolist |
---|
659 | %assign m (11b << 6) |
---|
660 | %assign i 0 |
---|
661 | %assign r 0 |
---|
662 | %ifidni %2, al |
---|
663 | %assign r (regAL << 3) |
---|
664 | %elifidni %2, ah |
---|
665 | %assign r (regAH << 3) |
---|
666 | %elifidni %2, bl |
---|
667 | %assign r (regBL << 3) |
---|
668 | %elifidni %2, bh |
---|
669 | %assign r (regBH << 3) |
---|
670 | %elifidni %2, cl |
---|
671 | %assign r (regCL << 3) |
---|
672 | %elifidni %2, ch |
---|
673 | %assign r (regCH << 3) |
---|
674 | %elifidni %2, dl |
---|
675 | %assign r (regDL << 3) |
---|
676 | %elifidni %2, dh |
---|
677 | %assign r (regDH << 3) |
---|
678 | %else |
---|
679 | %if %2 > 15 |
---|
680 | %error Invalid parameter passed to eEXT! (%2 > 15) |
---|
681 | %endif |
---|
682 | %assign i (1 << 3) |
---|
683 | %endif |
---|
684 | %ifidni %1, al |
---|
685 | %assign rm regAL |
---|
686 | %elifidni %1, ah |
---|
687 | %assign rm regAH |
---|
688 | %elifidni %1, bl |
---|
689 | %assign rm regBL |
---|
690 | %elifidni %1, bh |
---|
691 | %assign rm regBH |
---|
692 | %elifidni %1, cl |
---|
693 | %assign rm regCL |
---|
694 | %elifidni %1, ch |
---|
695 | %assign rm regCH |
---|
696 | %elifidni %1, dl |
---|
697 | %assign rm regDL |
---|
698 | %elifidni %1, dh |
---|
699 | %assign rm regDH |
---|
700 | %else |
---|
701 | %error Invalid parameter passed to eEXT! (%1) |
---|
702 | %endif |
---|
703 | db 0Fh, 33h | i, m | r | rm |
---|
704 | %if i |
---|
705 | db %2 |
---|
706 | %endif |
---|
707 | %endmacro |
---|
708 | |
---|
709 | |
---|
710 | ;-------------------------------------------------------------------- |
---|
711 | ; The INS instruction available on NEC V20/V30 CPUs. |
---|
712 | ; |
---|
713 | ; Stores the Source+1 least significant bits in AX to [xS:DI] |
---|
714 | ; plus an additional bit offset specified in Destination. |
---|
715 | ; Both Source and Destination must be at most 15. |
---|
716 | ; |
---|
717 | ; eINS |
---|
718 | ; Parameters: |
---|
719 | ; xS:DI: Pointer to bitfield. Default segment is ES but can be overridden |
---|
720 | ; %1: Destination (8-bit register) |
---|
721 | ; %2: Source (8-bit register or immediate value) |
---|
722 | ; Returns: |
---|
723 | ; %1: (%1 + %2 + 1) MOD 16 |
---|
724 | ; DI: DI + 2 (but only if %1 wrapped around) |
---|
725 | ; Corrupts registers: |
---|
726 | ; FLAGS |
---|
727 | ;-------------------------------------------------------------------- |
---|
728 | %macro eINS 2.nolist |
---|
729 | %assign m (11b << 6) |
---|
730 | %assign i 0 |
---|
731 | %assign r 0 |
---|
732 | %ifidni %2, al |
---|
733 | %assign r (regAL << 3) |
---|
734 | %elifidni %2, ah |
---|
735 | %assign r (regAH << 3) |
---|
736 | %elifidni %2, bl |
---|
737 | %assign r (regBL << 3) |
---|
738 | %elifidni %2, bh |
---|
739 | %assign r (regBH << 3) |
---|
740 | %elifidni %2, cl |
---|
741 | %assign r (regCL << 3) |
---|
742 | %elifidni %2, ch |
---|
743 | %assign r (regCH << 3) |
---|
744 | %elifidni %2, dl |
---|
745 | %assign r (regDL << 3) |
---|
746 | %elifidni %2, dh |
---|
747 | %assign r (regDH << 3) |
---|
748 | %else |
---|
749 | %if %2 > 15 |
---|
750 | %error Invalid parameter passed to eINS! (%2 > 15) |
---|
751 | %endif |
---|
752 | %assign i (1 << 3) |
---|
753 | %endif |
---|
754 | %ifidni %1, al |
---|
755 | %assign rm regAL |
---|
756 | %elifidni %1, ah |
---|
757 | %assign rm regAH |
---|
758 | %elifidni %1, bl |
---|
759 | %assign rm regBL |
---|
760 | %elifidni %1, bh |
---|
761 | %assign rm regBH |
---|
762 | %elifidni %1, cl |
---|
763 | %assign rm regCL |
---|
764 | %elifidni %1, ch |
---|
765 | %assign rm regCH |
---|
766 | %elifidni %1, dl |
---|
767 | %assign rm regDL |
---|
768 | %elifidni %1, dh |
---|
769 | %assign rm regDH |
---|
770 | %else |
---|
771 | %error Invalid parameter passed to eINS! (%1) |
---|
772 | %endif |
---|
773 | db 0Fh, 31h | i, m | r | rm |
---|
774 | %if i |
---|
775 | db %2 |
---|
776 | %endif |
---|
777 | %endmacro |
---|
778 | |
---|
779 | |
---|
780 | ;-------------------------------------------------------------------- |
---|
781 | ; The ROL4 instruction available on NEC V20/V30 CPUs. |
---|
782 | ; |
---|
783 | ; Rotates the destination four bits to the left via the low nibble of AL. |
---|
784 | ; |
---|
785 | ; eROL4 |
---|
786 | ; Parameters: |
---|
787 | ; %1: 8-bit destination (register or memory location) |
---|
788 | ; Returns: |
---|
789 | ; AL: The high nibble of %1 in the low nibble of AL |
---|
790 | ; %1: The low nibble of %1 in the high nibble of %1 |
---|
791 | ; The low nibble of AL in the low nibble of %1 |
---|
792 | ; Corrupts registers: |
---|
793 | ; Nothing (not even FLAGS) |
---|
794 | ;-------------------------------------------------------------------- |
---|
795 | %macro eROL4 1.nolist |
---|
796 | FSIS ], %1 |
---|
797 | %if strpos |
---|
798 | %assign m (00b << 6) |
---|
799 | FSIS [bx+si], %1 |
---|
800 | %if strpos |
---|
801 | %assign rm 000b |
---|
802 | %else |
---|
803 | FSIS [bx+di], %1 |
---|
804 | %if strpos |
---|
805 | %assign rm 001b |
---|
806 | %else |
---|
807 | FSIS [bp+si], %1 |
---|
808 | %if strpos |
---|
809 | %assign rm 010b |
---|
810 | %else |
---|
811 | FSIS [bp+di], %1 |
---|
812 | %if strpos |
---|
813 | %assign rm 011b |
---|
814 | %else |
---|
815 | FSIS [si], %1 |
---|
816 | %if strpos |
---|
817 | %assign rm 100b |
---|
818 | %else |
---|
819 | FSIS [di], %1 |
---|
820 | %if strpos |
---|
821 | %assign rm 101b |
---|
822 | %else |
---|
823 | FSIS [bx], %1 |
---|
824 | %if strpos |
---|
825 | %assign rm 111b |
---|
826 | %else |
---|
827 | %error "Memory operands are not (yet) fully supported by the eROL4 macro!" |
---|
828 | %endif |
---|
829 | %endif |
---|
830 | %endif |
---|
831 | %endif |
---|
832 | %endif |
---|
833 | %endif |
---|
834 | %endif |
---|
835 | %else |
---|
836 | %assign m (11b << 6) |
---|
837 | %ifidni %1, al |
---|
838 | %assign rm regAL |
---|
839 | %elifidni %1, ah |
---|
840 | %assign rm regAH |
---|
841 | %elifidni %1, bl |
---|
842 | %assign rm regBL |
---|
843 | %elifidni %1, bh |
---|
844 | %assign rm regBH |
---|
845 | %elifidni %1, cl |
---|
846 | %assign rm regCL |
---|
847 | %elifidni %1, ch |
---|
848 | %assign rm regCH |
---|
849 | %elifidni %1, dl |
---|
850 | %assign rm regDL |
---|
851 | %elifidni %1, dh |
---|
852 | %assign rm regDH |
---|
853 | %else |
---|
854 | %error Invalid parameter passed to eROL4! (%1) |
---|
855 | %endif |
---|
856 | %endif |
---|
857 | db 0Fh, 28h, m | rm |
---|
858 | %endmacro |
---|
859 | |
---|
860 | |
---|
861 | ;-------------------------------------------------------------------- |
---|
862 | ; The ROR4 instruction available on NEC V20/V30 CPUs. |
---|
863 | ; |
---|
864 | ; Rotates the destination four bits to the right via the low nibble of AL. |
---|
865 | ; |
---|
866 | ; eROR4 |
---|
867 | ; Parameters: |
---|
868 | ; %1: 8-bit destination (register or memory location) |
---|
869 | ; Returns: |
---|
870 | ; AL: The low nibble of %1 in the low nibble of AL |
---|
871 | ; %1: The high nibble of %1 in the low nibble of %1 |
---|
872 | ; The low nibble of AL in the high nibble of %1 |
---|
873 | ; Corrupts registers: |
---|
874 | ; Nothing (not even FLAGS) |
---|
875 | ;-------------------------------------------------------------------- |
---|
876 | %macro eROR4 1.nolist |
---|
877 | FSIS ], %1 |
---|
878 | %if strpos |
---|
879 | %assign m (00b << 6) |
---|
880 | FSIS [bx+si], %1 |
---|
881 | %if strpos |
---|
882 | %assign rm 000b |
---|
883 | %else |
---|
884 | FSIS [bx+di], %1 |
---|
885 | %if strpos |
---|
886 | %assign rm 001b |
---|
887 | %else |
---|
888 | FSIS [bp+si], %1 |
---|
889 | %if strpos |
---|
890 | %assign rm 010b |
---|
891 | %else |
---|
892 | FSIS [bp+di], %1 |
---|
893 | %if strpos |
---|
894 | %assign rm 011b |
---|
895 | %else |
---|
896 | FSIS [si], %1 |
---|
897 | %if strpos |
---|
898 | %assign rm 100b |
---|
899 | %else |
---|
900 | FSIS [di], %1 |
---|
901 | %if strpos |
---|
902 | %assign rm 101b |
---|
903 | %else |
---|
904 | FSIS [bx], %1 |
---|
905 | %if strpos |
---|
906 | %assign rm 111b |
---|
907 | %else |
---|
908 | %error "Memory operands are not (yet) fully supported by the eROR4 macro!" |
---|
909 | %endif |
---|
910 | %endif |
---|
911 | %endif |
---|
912 | %endif |
---|
913 | %endif |
---|
914 | %endif |
---|
915 | %endif |
---|
916 | %else |
---|
917 | %assign m (11b << 6) |
---|
918 | %ifidni %1, al |
---|
919 | %assign rm regAL |
---|
920 | %elifidni %1, ah |
---|
921 | %assign rm regAH |
---|
922 | %elifidni %1, bl |
---|
923 | %assign rm regBL |
---|
924 | %elifidni %1, bh |
---|
925 | %assign rm regBH |
---|
926 | %elifidni %1, cl |
---|
927 | %assign rm regCL |
---|
928 | %elifidni %1, ch |
---|
929 | %assign rm regCH |
---|
930 | %elifidni %1, dl |
---|
931 | %assign rm regDL |
---|
932 | %elifidni %1, dh |
---|
933 | %assign rm regDH |
---|
934 | %else |
---|
935 | %error Invalid parameter passed to eROR4! (%1) |
---|
936 | %endif |
---|
937 | %endif |
---|
938 | db 0Fh, 2Ah, m | rm |
---|
939 | %endmacro |
---|
940 | |
---|
941 | |
---|
942 | ;-------------------------------------------------------------------- |
---|
943 | ; The ADD4S instruction available on NEC V20/V30 CPUs. |
---|
944 | ; |
---|
945 | ; Adds packed BCD string at xS:SI to packed BCD string at ES:DI |
---|
946 | ; with (preferably even) nibble count in CL. |
---|
947 | ; |
---|
948 | ; eADD4S |
---|
949 | ; Parameters: |
---|
950 | ; CL: Number of packed BCD digits (nibbles in string) ranging |
---|
951 | ; from 1 to 254. Should be an even number or the CPU will |
---|
952 | ; treat it as CL+1. |
---|
953 | ; xS:SI: Pointer to source string. Default segment is DS but |
---|
954 | ; can be overridden. |
---|
955 | ; ES:DI: Pointer to destination string. |
---|
956 | ; Returns: |
---|
957 | ; ES:DI: Pointer to destination string. |
---|
958 | ; CF/ZF: Set according to result. |
---|
959 | ; Corrupts registers: |
---|
960 | ; All other FLAGS |
---|
961 | ;-------------------------------------------------------------------- |
---|
962 | %macro eADD4S 0.nolist |
---|
963 | db 0Fh, 20h |
---|
964 | %endmacro |
---|
965 | |
---|
966 | |
---|
967 | ;-------------------------------------------------------------------- |
---|
968 | ; The SUB4S instruction available on NEC V20/V30 CPUs. |
---|
969 | ; |
---|
970 | ; Subtracts packed BCD string at xS:SI from packed BCD string at ES:DI |
---|
971 | ; with (preferably even) nibble count in CL. |
---|
972 | ; |
---|
973 | ; eSUB4S |
---|
974 | ; Parameters: |
---|
975 | ; CL: Number of packed BCD digits (nibbles in string) ranging |
---|
976 | ; from 1 to 254. Should be an even number or the CPU will |
---|
977 | ; treat it as CL+1. |
---|
978 | ; xS:SI: Pointer to source string. Default segment is DS but |
---|
979 | ; can be overridden. |
---|
980 | ; ES:DI: Pointer to destination string. |
---|
981 | ; Returns: |
---|
982 | ; ES:DI: Pointer to destination string. |
---|
983 | ; CF/ZF: Set according to result. |
---|
984 | ; Corrupts registers: |
---|
985 | ; All other FLAGS |
---|
986 | ;-------------------------------------------------------------------- |
---|
987 | %macro eSUB4S 0.nolist |
---|
988 | db 0Fh, 22h |
---|
989 | %endmacro |
---|
990 | |
---|
991 | |
---|
992 | ;-------------------------------------------------------------------- |
---|
993 | ; The CMP4S instruction available on NEC V20/V30 CPUs. |
---|
994 | ; |
---|
995 | ; Compares packed BCD string at xS:SI with packed BCD string at ES:DI |
---|
996 | ; with (preferably even) nibble count in CL. |
---|
997 | ; |
---|
998 | ; eCMP4S |
---|
999 | ; Parameters: |
---|
1000 | ; CL: Number of packed BCD digits (nibbles in string) ranging |
---|
1001 | ; from 1 to 254. Should be an even number or the CPU will |
---|
1002 | ; treat it as CL+1. |
---|
1003 | ; xS:SI: Pointer to source string. Default segment is DS but |
---|
1004 | ; can be overridden. |
---|
1005 | ; ES:DI: Pointer to destination string. |
---|
1006 | ; Returns: |
---|
1007 | ; CF/ZF: Set according to result. |
---|
1008 | ; Corrupts registers: |
---|
1009 | ; All other FLAGS |
---|
1010 | ;-------------------------------------------------------------------- |
---|
1011 | %macro eCMP4S 0.nolist |
---|
1012 | db 0Fh, 26h |
---|
1013 | %endmacro |
---|
1014 | |
---|
1015 | |
---|
1016 | ;-------------------------------------------------------------------- |
---|
1017 | ; The BRKEM instruction available on NEC V20/V30 CPUs. |
---|
1018 | ; |
---|
1019 | ; Starts 8080 CPU emulation mode by invoking the software interrupt in %1. |
---|
1020 | ; |
---|
1021 | ; eBRKEM |
---|
1022 | ; Parameters: |
---|
1023 | ; %1: 8-bit interrupt vector number |
---|
1024 | ; Returns: |
---|
1025 | ; Nothing |
---|
1026 | ; Corrupts registers: |
---|
1027 | ; Nothing |
---|
1028 | ;-------------------------------------------------------------------- |
---|
1029 | %macro eBRKEM 1.nolist |
---|
1030 | %if %1 > 255 |
---|
1031 | %error Invalid parameter passed to eBRKEM! (%1 > 255) |
---|
1032 | %else |
---|
1033 | db 0Fh, 0FFh, %1 |
---|
1034 | %endif |
---|
1035 | %endmacro |
---|
1036 | |
---|
1037 | |
---|
1038 | ;-------------------------------------------------------------------- |
---|
1039 | ; The CALLN instruction available on NEC V20/V30 CPUs. |
---|
1040 | ; |
---|
1041 | ; This instruction is used while in 8080 CPU emulation mode to invoke |
---|
1042 | ; the native (x86) software interrupt in %1. |
---|
1043 | ; |
---|
1044 | ; eCALLN |
---|
1045 | ; Parameters: |
---|
1046 | ; %1: 8-bit interrupt vector number |
---|
1047 | ; Returns: |
---|
1048 | ; Nothing |
---|
1049 | ; Corrupts registers: |
---|
1050 | ; Nothing |
---|
1051 | ;-------------------------------------------------------------------- |
---|
1052 | %macro eCALLN 1.nolist |
---|
1053 | %if %1 > 255 |
---|
1054 | %error Invalid parameter passed to eCALLN! (%1 > 255) |
---|
1055 | %else |
---|
1056 | db 0EDh, 0EDh, %1 |
---|
1057 | %endif |
---|
1058 | %endmacro |
---|
1059 | |
---|
1060 | |
---|
1061 | ;-------------------------------------------------------------------- |
---|
1062 | ; The RETEM instruction available on NEC V20/V30 CPUs. |
---|
1063 | ; |
---|
1064 | ; Ends 8080 CPU emulation mode by returning from the software interrupt |
---|
1065 | ; invoked by BRKEM. |
---|
1066 | ; |
---|
1067 | ; eRETEM |
---|
1068 | ; Parameters: |
---|
1069 | ; Nothing |
---|
1070 | ; Returns: |
---|
1071 | ; Nothing |
---|
1072 | ; Corrupts registers: |
---|
1073 | ; Nothing |
---|
1074 | ;-------------------------------------------------------------------- |
---|
1075 | %macro eRETEM 0.nolist |
---|
1076 | db 0EDh, 0FDh |
---|
1077 | %endmacro |
---|
1078 | |
---|
1079 | |
---|
1080 | %endif ; NEC_V_INC |
---|
1081 | |
---|